Searched refs:MoveReg (Results 1 – 5 of 5) sorted by relevance
| /openbsd/gnu/llvm/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 163 MoveReg, enumerator
289 bool isMoveReg() const { return Flags & (1ULL << MCID::MoveReg); } in isMoveReg()
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| /openbsd/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 394 Register MoveReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMoveToFPReg() local
396 TII.get(ARM::VMOVSR), MoveReg) in ARMMoveToFPReg()
398 return MoveReg; in ARMMoveToFPReg()
404 Register MoveReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMoveToIntReg() local
406 TII.get(ARM::VMOVRS), MoveReg) in ARMMoveToIntReg()
408 return MoveReg; in ARMMoveToIntReg()
995 Register MoveReg = createResultReg(TLI.getRegClassFor(MVT::f32)); in ARMEmitLoad() local
997 TII.get(ARM::VMOVSR), MoveReg) in ARMEmitLoad()
999 ResultReg = MoveReg; in ARMEmitLoad()
1103 TII.get(ARM::VMOVRS), MoveReg) in ARMEmitStore()
[all …]
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| /openbsd/gnu/llvm/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 185 Register MoveReg = MRI.createVirtualRegister(&PPC::VSFRCRegClass); in selectIntToFP() local
188 BuildMI(MBB, I, DbgLoc, TII.get(PPC::MTVSRD), MoveReg).addReg(SrcReg); in selectIntToFP()
196 BuildMI(MBB, I, DbgLoc, TII.get(ConvOp), DstReg).addReg(MoveReg); in selectIntToFP()
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| /openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 2508 unsigned MoveReg = PPC::R12; in restoreCRs() local
2512 addFrameReference(BuildMI(*MF, DL, TII.get(PPC::LWZ), MoveReg), in restoreCRs()
2518 .addReg(MoveReg, getKillRegState(!CR3Spilled && !CR4Spilled))); in restoreCRs()
2522 .addReg(MoveReg, getKillRegState(!CR4Spilled))); in restoreCRs()
2526 .addReg(MoveReg, getKillRegState(true))); in restoreCRs()
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| /openbsd/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 954 return hasProperty(MCID::MoveReg, Type);
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