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Searched refs:PA_CL_NANINF_CNTL__VTE_Z_INF_DISCARD__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h5659 #define PA_CL_NANINF_CNTL__VTE_Z_INF_DISCARD__SHIFT 0x00000001 macro
H A Dgfx_7_2_sh_mask.h5536 #define PA_CL_NANINF_CNTL__VTE_Z_INF_DISCARD__SHIFT 0x1 macro
H A Dgfx_8_0_sh_mask.h6324 #define PA_CL_NANINF_CNTL__VTE_Z_INF_DISCARD__SHIFT 0x1 macro
H A Dgfx_8_1_sh_mask.h6858 #define PA_CL_NANINF_CNTL__VTE_Z_INF_DISCARD__SHIFT 0x1 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h17038 #define PA_CL_NANINF_CNTL__VTE_Z_INF_DISCARD__SHIFT … macro
H A Dgc_9_1_sh_mask.h18347 #define PA_CL_NANINF_CNTL__VTE_Z_INF_DISCARD__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h18224 #define PA_CL_NANINF_CNTL__VTE_Z_INF_DISCARD__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h20350 #define PA_CL_NANINF_CNTL__VTE_Z_INF_DISCARD__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h10471 #define PA_CL_NANINF_CNTL__VTE_Z_INF_DISCARD__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h22247 #define PA_CL_NANINF_CNTL__VTE_Z_INF_DISCARD__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h24537 #define PA_CL_NANINF_CNTL__VTE_Z_INF_DISCARD__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h24579 #define PA_CL_NANINF_CNTL__VTE_Z_INF_DISCARD__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h22730 #define PA_CL_NANINF_CNTL__VTE_Z_INF_DISCARD__SHIFT … macro