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Searched refs:PCIE_LC_TRAINING_CNTL__LC_ALLOW_TX_L1_CONTROL__SHIFT (Results 1 – 8 of 8) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h7305 #define PCIE_LC_TRAINING_CNTL__LC_ALLOW_TX_L1_CONTROL__SHIFT 0x0000001c macro
H A Dbif_4_1_sh_mask.h3246 #define PCIE_LC_TRAINING_CNTL__LC_ALLOW_TX_L1_CONTROL__SHIFT 0x1c macro
H A Dbif_5_0_sh_mask.h10994 #define PCIE_LC_TRAINING_CNTL__LC_ALLOW_TX_L1_CONTROL__SHIFT 0x1c macro
H A Dbif_5_1_sh_mask.h4200 #define PCIE_LC_TRAINING_CNTL__LC_ALLOW_TX_L1_CONTROL__SHIFT 0x1c macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h42623 #define PCIE_LC_TRAINING_CNTL__LC_ALLOW_TX_L1_CONTROL__SHIFT … macro
H A Dnbio_4_3_0_sh_mask.h31519 #define PCIE_LC_TRAINING_CNTL__LC_ALLOW_TX_L1_CONTROL__SHIFT … macro
H A Dnbio_2_3_sh_mask.h53766 #define PCIE_LC_TRAINING_CNTL__LC_ALLOW_TX_L1_CONTROL__SHIFT … macro
H A Dnbio_6_1_sh_mask.h37983 #define PCIE_LC_TRAINING_CNTL__LC_ALLOW_TX_L1_CONTROL__SHIFT … macro