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Searched refs:PHYBSYMCLK_CLOCK_CNTL (Results 1 – 7 of 7) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/display/dc/dcn30/
H A Ddcn30_dccg.h35 SR(PHYBSYMCLK_CLOCK_CNTL),\
46 SR(PHYBSYMCLK_CLOCK_CNTL),\
55 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\
56 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_SRC_SEL, mask_sh),\
64 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\
65 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_SRC_SEL, mask_sh),\
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn31/
H A Ddcn31_dccg.h38 SR(PHYBSYMCLK_CLOCK_CNTL),\
83 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\
84 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_SRC_SEL, mask_sh),\
H A Ddcn31_dccg.c471 REG_UPDATE_2(PHYBSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
478 REG_UPDATE_2(PHYBSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn314/
H A Ddcn314_dccg.h44 SR(PHYBSYMCLK_CLOCK_CNTL),\
178 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\
179 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_SRC_SEL, mask_sh),\
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn32/
H A Ddcn32_dccg.h49 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\
50 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_SRC_SEL, mask_sh),\
H A Ddcn32_resource.h1290 SR(PHYASYMCLK_CLOCK_CNTL), SR(PHYBSYMCLK_CLOCK_CNTL), \
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn20/
H A Ddcn20_dccg.h267 uint32_t PHYBSYMCLK_CLOCK_CNTL; member