xref: /openbsd/sys/arch/octeon/dev/cn30xxpkoreg.h (revision 52334306)
1 /*
2  * THIS FILE IS AUTOMATICALLY GENERATED
3  * DONT EDIT THIS FILE
4  */
5 
6 /*	$OpenBSD: cn30xxpkoreg.h,v 1.3 2022/12/28 01:39:21 yasuoka Exp $	*/
7 
8 /*
9  * Copyright (c) 2007 Internet Initiative Japan, Inc.
10  * All rights reserved.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE
25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31  * SUCH DAMAGE.
32  */
33 
34 /*
35  * Cavium Networks OCTEON CN30XX Hardware Reference Manual
36  * CN30XX-HM-1.0
37  * 8.9 PKO Registers
38  */
39 
40 #ifndef _CN30XXPKOREG_H_
41 #define _CN30XXPKOREG_H_
42 
43 #define	PKO_REG_FLAGS				0x0001180050000000ULL
44 #define	PKO_REG_READ_IDX			0x0001180050000008ULL
45 #define	PKO_REG_CMD_BUF				0x0001180050000010ULL
46 #define	PKO_REG_GMX_PORT_MODE			0x0001180050000018ULL
47 #define	PKO_REG_QUEUE_MODE			0x0001180050000048ULL
48 #define	PKO_REG_BIST_RESULT			0x0001180050000050ULL
49 #define	PKO_REG_ERROR				0x0001180050000058ULL
50 #define	PKO_REG_INT_MASK			0x0001180050000090ULL
51 #define	PKO_REG_DEBUG0				0x0001180050000098ULL
52 #define	PKO_MEM_QUEUE_PTRS			0x0001180050001000ULL
53 #define	PKO_MEM_QUEUE_QOS			0x0001180050001008ULL
54 #define	PKO_MEM_COUNT0				0x0001180050001080ULL
55 #define	PKO_MEM_COUNT1				0x0001180050001088ULL
56 #define	PKO_DEBUG0				0x0001180050001100ULL
57 #define	PKO_DEBUG1				0x0001180050001108ULL
58 #define	PKO_DEBUG2				0x0001180050001110ULL
59 #define	PKO_DEBUG3				0x0001180050001118ULL
60 #define	PKO_DEBUG4				0x0001180050001120ULL
61 #define	PKO_DEBUG5				0x0001180050001128ULL
62 #define	PKO_DEBUG6				0x0001180050001130ULL
63 #define	PKO_DEBUG7				0x0001180050001138ULL
64 #define	PKO_DEBUG8				0x0001180050001140ULL
65 #define	PKO_DEBUG9				0x0001180050001148ULL
66 #define	PKO_DEBUG10				0x0001180050001150ULL
67 #define	PKO_DEBUG11				0x0001180050001158ULL
68 #define	PKO_DEBUG12				0x0001180050001160ULL
69 #define	PKO_DEBUG13				0x0001180050001168ULL
70 #define	PKO_DEBUG14				0x0001180050001170ULL
71 
72 #define PKO_BASE				0x0001180050000000ULL
73 #define	PKO_SIZE				0x01178ULL
74 
75 #define PKO_REG_FLAGS_OFFSET			0x00000ULL
76 #define PKO_REG_READ_IDX_OFFSET			0x00008ULL
77 #define	PKO_REG_CMD_BUF_OFFSET			0x00010ULL
78 #define	PKO_REG_GMX_PORT_MODE_OFFSET		0x00018ULL
79 #define	PKO_REG_QUEUE_MODE_OFFSET		0x00048ULL
80 #define	PKO_REG_BIST_RESULT_OFFSET		0x00080ULL
81 #define	PKO_REG_ERROR_OFFSET			0x00088ULL
82 #define	PKO_REG_INT_MASK_OFFSET			0x00090ULL
83 #define	PKO_REG_DEBUG0_OFFSET			0x00098ULL
84 #define	PKO_MEM_QUEUE_PTRS_OFFSET		0x01000ULL
85 #define	PKO_MEM_QUEUE_QOS_OFFSET		0x01008ULL
86 #define	PKO_MEM_PORT_PTRS_OFFSET		0x01010ULL
87 #define	PKO_MEM_COUNT0_OFFSET			0x01080ULL
88 #define	PKO_MEM_COUNT1_OFFSET			0x01088ULL
89 #define	PKO_MEM_DEBUG0_OFFSET			0x01100ULL
90 #define	PKO_MEM_DEBUG1_OFFSET			0x01108ULL
91 #define	PKO_MEM_DEBUG2_OFFSET			0x01110ULL
92 #define	PKO_MEM_DEBUG3_OFFSET			0x01118ULL
93 #define	PKO_MEM_DEBUG4_OFFSET			0x01120ULL
94 #define	PKO_MEM_DEBUG5_OFFSET			0x01128ULL
95 #define	PKO_MEM_DEBUG6_OFFSET			0x01130ULL
96 #define	PKO_MEM_DEBUG7_OFFSET			0x01138ULL
97 #define	PKO_MEM_DEBUG8_OFFSET			0x01140ULL
98 #define	PKO_MEM_DEBUG9_OFFSET			0x01148ULL
99 #define	PKO_MEM_DEBUG10_OFFSET			0x01150ULL
100 #define	PKO_MEM_DEBUG11_OFFSET			0x01158ULL
101 #define	PKO_MEM_DEBUG12_OFFSET			0x01160ULL
102 #define	PKO_MEM_DEBUG13_OFFSET			0x01168ULL
103 #define	PKO_MEM_DEBUG14_OFFSET			0x01170ULL
104 
105 /*
106  * PKO_REG_FLAGS
107  */
108 #define PKO_REG_FLAGS_63_7		0xfffffffffffffff0ULL
109 #define PKO_REG_FLAGS_RESET		0x0000000000000008ULL
110 #define PKO_REG_FLAGS_STORE_BE		0x0000000000000004ULL
111 #define PKO_REG_FLAGS_ENA_DWB		0x0000000000000002ULL
112 #define PKO_REG_FLAGS_ENA_PKO		0x0000000000000001ULL
113 
114 /*
115  * PKO_REG_READ_IDX
116  */
117 #define PKO_REG_READ_IDX_63_16		0xffffffffffff0000ULL
118 #define PKO_REG_READ_IDX_INC		0x000000000000ff00ULL
119 #define PKO_REG_READ_IDX_IDX		0x00000000000000ffULL
120 
121 /*
122  * PKO_REG_CMD_BUF
123  */
124 #define PKO_REG_CMD_BUF_63_23		0xffffffffff800000ULL
125 #define PKO_REG_CMD_BUF_POOL		0x0000000000700000ULL
126 #define PKO_REG_CMD_BUF_19_13		0x00000000000fe000ULL
127 #define PKO_REG_CMD_BUF_SIZE		0x0000000000001fffULL
128 
129 /*
130  * PKO_REG_GMX_PORT_MODE
131  */
132 #define PKO_REG_GMX_PORT_MODE_63_6	0xffffffffffffffc0ULL
133 #define PKO_REG_GMX_PORT_MODE_MODE1	0x0000000000000038ULL
134 #define PKO_REG_GMX_PORT_MODE_MODE0	0x0000000000000007ULL
135 
136 /*
137  * PKO_REG_QUEUE_MODE
138  */
139 #define PKO_REG_QUEUE_MODE_63_6		0xfffffffffffffffcULL
140 #define PKO_REG_QUEUE_MODE_MODE		0x000000000000000eULL
141 
142 /*
143  * PKO_REG_BIST_RESULT
144  */
145 #define PKO_REG_BIST_RESULT_63_27	0xfffffffff8000000ULL
146 #define PKO_REG_BIST_RESULT_PSB2	0x0000000007c00000ULL
147 #define PKO_REG_BIST_RESULT_COUNT	0x0000000000200000ULL
148 #define PKO_REG_BIST_RESULT_RIF		0x0000000000100000ULL
149 #define PKO_REG_BIST_RESULT_WIF		0x0000000000080000ULL
150 #define PKO_REG_BIST_RESULT_NCB		0x0000000000040000ULL
151 #define PKO_REG_BIST_RESULT_OUT		0x0000000000020000ULL
152 #define PKO_REG_BIST_RESULT_CRC		0x0000000000010000ULL
153 #define PKO_REG_BIST_RESULT_CHK		0x0000000000008000ULL
154 #define PKO_REG_BIST_RESULT_QSB		0x0000000000006000ULL
155 #define PKO_REG_BIST_RESULT_QCB		0x0000000000001800ULL
156 #define PKO_REG_BIST_RESULT_PDB		0x0000000000000780ULL
157 #define PKO_REG_BIST_RESULT_PSB		0x000000000000007fULL
158 
159 /*
160  * PKO_REG_ERROR
161  */
162 #define PKO_REG_ERROR_63_2		0xfffffffffffffffcULL
163 #define PKO_REG_ERROR_DOORBELL		0x0000000000000002ULL
164 #define PKO_REG_ERROR_PARITY		0x0000000000000001ULL
165 
166 /*
167  * PKO_REG_INT_MASK
168  */
169 #define PKO_REG_INT_MASK_63_2		0xfffffffffffffffcULL
170 #define PKO_REG_INT_MASK_DOORBELL	0x0000000000000002ULL
171 #define PKO_REG_INT_MASK_PARITY		0x0000000000000001ULL
172 
173 /*
174  * PKO_REG_DEBUG0
175  */
176 #define PKO_REG_DEBUG0_63_17		0xfffffffffffe0000ULL
177 #define PKO_REG_DEBUG0_ASSERTS		0x000000000001ffffULL
178 
179 /*
180  * PKO_MEM_QUEUE_PTRS
181  */
182 #define PKO_MEM_QUEUE_PTRS_S_TAIL	0x8000000000000000ULL
183 #define PKO_MEM_QUEUE_PTRS_STATIC_P	0x4000000000000000ULL
184 #define PKO_MEM_QUEUE_PTRS_STATIC_Q	0x2000000000000000ULL
185 #define PKO_MEM_QUEUE_PTRS_QOS_MASK	0x1fe0000000000000ULL
186 #define PKO_MEM_QUEUE_PTRS_BUF_PTR	0x001ffffffffe0000ULL
187 #define PKO_MEM_QUEUE_PTRS_TAIL		0x0000000000010000ULL
188 #define PKO_MEM_QUEUE_PTRS_IDX		0x000000000000e000ULL
189 #define PKO_MEM_QUEUE_PTRS_PID		0x0000000000001f80ULL
190 #define PKO_MEM_QUEUE_PTRS_QID		0x000000000000007fULL
191 
192 /*
193  * PKO_MEM_QUEUE_QOS
194  */
195 #define PKO_MEM_QUEUE_QOS_63_61		0xe000000000000000ULL
196 #define PKO_MEM_QUEUE_QOS_QOS_MASK	0x1fe0000000000000ULL
197 #define PKO_MEM_QUEUE_QOS_52_13		0x001fffffffffe000ULL
198 #define PKO_MEM_QUEUE_QOS_PID		0x0000000000001f80ULL
199 #define PKO_MEM_QUEUE_QOS_QID		0x000000000000007fULL
200 
201 /*
202  * PKO_MEM_PORT_PTRS
203  */
204 #define PKO_MEM_PORT_PTRS_BP_PORT_M	0x000000000000fc00ULL
205 #define PKO_MEM_PORT_PTRS_BP_PORT_S	10
206 #define PKO_MEM_PORT_PTRS_EID_M		0x00000000000003c0ULL
207 #define PKO_MEM_PORT_PTRS_EID_S		6
208 #define PKO_MEM_PORT_PTRS_PID_M		0x000000000000003fULL
209 
210 /*
211  * PKO_MEM_COUNT0
212  */
213 #define PKO_MEM_COUNT0_63_32		0xffffffff00000000ULL
214 #define PKO_MEM_COUNT0_COUNT		0x00000000ffffffffULL
215 
216 /*
217  * PKO_MEM_COUNT1
218  */
219 #define PKO_MEM_COUNT1_63_48		0xffff000000000000ULL
220 #define PKO_MEM_COUNT1_COUNT		0x0000ffffffffffffULL
221 
222 /*
223  * PKO_MEM_DEBUG0
224  */
225 #define PKO_MEM_DEBUG0_FAU		0xfffffff000000000ULL
226 #define PKO_MEM_DEBUG0_CMD		0x0000000fffc00000ULL
227 #define PKO_MEM_DEBUG0_SEGS		0x00000000003f0000ULL
228 #define PKO_MEM_DEBUG0_SIZE		0x000000000000ffffULL
229 
230 /*
231  * PKO_MEM_DEBUG1
232  */
233 #define PKO_MEM_DEBUG1_I		0x8000000000000000ULL
234 #define PKO_MEM_DEBUG1_BACK		0x7800000000000000ULL
235 #define PKO_MEM_DEBUG1_POOL		0x0700000000000000ULL
236 #define PKO_MEM_DEBUG1_SIZE		0x00ffff0000000000ULL
237 #define PKO_MEM_DEBUG1_PTR		0x000000ffffffffffULL
238 
239 /*
240  * PKO_MEM_DEBUG2
241  */
242 #define PKO_MEM_DEBUG2_I		0x8000000000000000ULL
243 #define PKO_MEM_DEBUG2_BACK		0x7800000000000000ULL
244 #define PKO_MEM_DEBUG2_POOL		0x0700000000000000ULL
245 #define PKO_MEM_DEBUG2_SIZE		0x00ffff0000000000ULL
246 #define PKO_MEM_DEBUG2_PTR		0x000000ffffffffffULL
247 
248 /*
249  * PKO_MEM_DEBUG3
250  */
251 #define PKO_MEM_DEBUG3_I		0x8000000000000000ULL
252 #define PKO_MEM_DEBUG3_BACK		0x7800000000000000ULL
253 #define PKO_MEM_DEBUG3_POOL		0x0700000000000000ULL
254 #define PKO_MEM_DEBUG3_SIZE		0x00ffff0000000000ULL
255 #define PKO_MEM_DEBUG3_PTR		0x000000ffffffffffULL
256 
257 /*
258  * PKO_MEM_DEBUG4
259  */
260 #define PKO_MEM_DEBUG4_DATA		0xffffffffffffffffULL
261 
262 /*
263  * PKO_MEM_DEBUG5
264  */
265 #define PKO_MEM_DEBUG5_DWRI_MOD			0x8000000000000000ULL
266 #define PKO_MEM_DEBUG5_DWRI_SOP			0x4000000000000000ULL
267 #define PKO_MEM_DEBUG5_DWRI_LEN			0x2000000000000000ULL
268 #define PKO_MEM_DEBUG5_DWRI_CNT			0x1fff000000000000ULL
269 #define PKO_MEM_DEBUG5_CMND_SIZ			0x0000ffff00000000ULL
270 #define PKO_MEM_DEBUG5_UID			0x0000000080000000ULL
271 #define PKO_MEM_DEBUG5_XFER_WOR			0x0000000040000000ULL
272 #define PKO_MEM_DEBUG5_XFER_DWR			0x0000000020000000ULL
273 #define PKO_MEM_DEBUG5_CBUF_FRE			0x0000000010000000ULL
274 #define PKO_MEM_DEBUG5_27			0x0000000008000000ULL
275 #define PKO_MEM_DEBUG5_CHK_MODE			0x0000000004000000ULL
276 #define PKO_MEM_DEBUG5_ACTIVE			0x0000000002000000ULL
277 #define PKO_MEM_DEBUG5_QOS			0x0000000001c00000ULL
278 #define PKO_MEM_DEBUG5_QCB_RIDX			0x00000000003e0000ULL
279 #define PKO_MEM_DEBUG5_QID_OFF			0x000000000001c000ULL
280 #define PKO_MEM_DEBUG5_QID_BASE			0x0000000000003f80ULL
281 #define PKO_MEM_DEBUG5_WAIT			0x0000000000000040ULL
282 #define PKO_MEM_DEBUG5_MINOR			0x0000000000000030ULL
283 #define PKO_MEM_DEBUG5_MAJOR			0x000000000000000fULL
284 
285 /*
286  * PKO_MEM_DEBUG6
287  */
288 #define PKO_MEM_DEBUG6_63_11		0xfffffffffffff800ULL
289 #define PKO_MEM_DEBUG6_QID_OFFM		0x0000000000000700ULL
290 #define PKO_MEM_DEBUG6_STATIC_P		0x0000000000000080ULL
291 #define PKO_MEM_DEBUG6_WORK_MIN		0x0000000000000070ULL
292 #define PKO_MEM_DEBUG6_DWRI_CHK		0x0000000000000008ULL
293 #define PKO_MEM_DEBUG6_DWRI_UID		0x0000000000000004ULL
294 #define PKO_MEM_DEBUG6_DWRI_MOD		0x0000000000000003ULL
295 
296 /*
297  * PKO_MEM_DEBUG7
298  */
299 #define PKO_MEM_DEBUG7_63_58		0xfc00000000000000ULL
300 #define PKO_MEM_DEBUG7_DWB		0x03fe000000000000ULL
301 #define PKO_MEM_DEBUG7_START		0x0001ffffffff0000ULL
302 #define PKO_MEM_DEBUG7_SIZE		0x000000000000ffffULL
303 
304 /*
305  * PKO_MEM_DEBUG8
306  */
307 #define PKO_MEM_DEBUG8_QOS		0xf800000000000000ULL
308 #define PKO_MEM_DEBUG8_TAIL		0x0400000000000000ULL
309 #define PKO_MEM_DEBUG8_BUF_SIZ		0x03ffe00000000000ULL
310 #define PKO_MEM_DEBUG8_BUF_PTR		0x00001ffffffff000ULL
311 #define PKO_MEM_DEBUG8_QCB_WIDX		0x0000000000000fc0ULL
312 #define PKO_MEM_DEBUG8_QCB_RIDX		0x000000000000003fULL
313 
314 /*
315  * PKO_MEM_DEBUG9
316  */
317 #define PKO_MEM_DEBUG9_63_28		0xfffffffff0000000ULL
318 #define PKO_MEM_DEBUG9_DOORBELL		0x000000000fffff00ULL
319 #define PKO_MEM_DEBUG9_7_5		0x00000000000000e0ULL
320 #define PKO_MEM_DEBUG9_S_TAIL		0x0000000000000010ULL
321 #define PKO_MEM_DEBUG9_STATIC_Q		0x0000000000000008ULL
322 #define PKO_MEM_DEBUG9_QOOS		0x0000000000000007ULL
323 
324 /*
325  * PKO_MEM_DEBUG10
326  */
327 #define PKO_MEM_DEBUG10_FAU		0xfffffff000000000ULL
328 #define PKO_MEM_DEBUG10_CMD		0x0000000fffc00000ULL
329 #define PKO_MEM_DEBUG10_SEGS		0x00000000003f0000ULL
330 #define PKO_MEM_DEBUG10_SIZE		0x000000000000ffffULL
331 
332 /*
333  * PKO_MEM_DEBUG11
334  */
335 #define PKO_MEM_DEBUG11_I		0x8000000000000000ULL
336 #define PKO_MEM_DEBUG11_BACK		0x7800000000000000ULL
337 #define PKO_MEM_DEBUG11_POOL		0x0700000000000000ULL
338 #define PKO_MEM_DEBUG11_SIZE		0x00ffff0000000000ULL
339 #define PKO_MEM_DEBUG11_PTR		0x000000ffffffffffULL
340 
341 /*
342  * PKO_MEM_DEBUG12
343  */
344 #define PKO_MEM_DEBUG12_DATA		0xffffffffffffffffULL
345 
346 /*
347  * PKO_MEM_DEBUG13
348  */
349 #define PKO_MEM_DEBUG13_63_51		0xfff8000000000000ULL
350 #define PKO_MEM_DEBUG13_WIDX		0x0007fffc00000000ULL
351 #define PKO_MEM_DEBUG13_RIDX2		0x00000003fffe0000ULL
352 #define PKO_MEM_DEBUG13_WIDX2		0x000000000001ffffULL
353 
354 /*
355  * PKO_MEM_DEBUG14
356  */
357 #define PKO_MEM_DEBUG13_63_17		0xfffffffffffe0000ULL
358 #define PKO_MEM_DEBUG13_RIDX		0x000000000001ffffULL
359 
360 /*
361  * PKO_CMD_WORD0
362  */
363 #define PKO_CMD_WORD0_SZ1		0xc000000000000000ULL
364 #define PKO_CMD_WORD0_SZ0		0x3000000000000000ULL
365 #define PKO_CMD_WORD0_S1		0x0800000000000000ULL
366 #define PKO_CMD_WORD0_REG1		0x07ff000000000000ULL
367 #define PKO_CMD_WORD0_S0		0x0000800000000000ULL
368 #define PKO_CMD_WORD0_REG0		0x00007ff000000000ULL
369 #define PKO_CMD_WORD0_LE		0x0000000800000000ULL
370 #define PKO_CMD_WORD0_N2		0x0000000400000000ULL
371 #define PKO_CMD_WORD0_Q			0x0000000200000000ULL
372 #define PKO_CMD_WORD0_R			0x0000000100000000ULL
373 #define PKO_CMD_WORD0_G			0x0000000080000000ULL
374 #define PKO_CMD_WORD0_IPOFFP1		0x000000007f000000ULL
375 #define PKO_CMD_WORD0_II		0x0000000000800000ULL
376 #define PKO_CMD_WORD0_DF		0x0000000000400000ULL
377 #define PKO_CMD_WORD0_SEGS		0x00000000003f0000ULL
378 #define PKO_CMD_WORD0_TOTALBYTES	0x000000000000ffffULL
379 
380 /*
381  * PKO_CMD_WORD1
382  */
383 #define PKO_CMD_WORD1_I			0x8000000000000000ULL
384 #define PKO_CMD_WORD1_BACK		0x7800000000000000ULL
385 #define PKO_CMD_WORD1_POOL		0x0700000000000000ULL
386 #define PKO_CMD_WORD1_SIZE		0x00ffff0000000000ULL
387 #define PKO_CMD_WORD1_ADDR		0x000000ffffffffffULL
388 
389 /*
390  * PKO_CMD_WORD2
391  */
392 #define PKO_CMD_WORD2_63_36		0xfffffff000000000ULL
393 #define PKO_CMD_WORD2_PTR		0x0000000fffffffffULL
394 
395 /*
396  *  DOORBELL_WRITE
397  */
398 #define PKO_DOORBELL_WRITE_IO_BIT	0x0001000000000000ULL
399 #define PKO_DOORBELL_WRITE_MAJOR_DID	0x0000f80000000000ULL
400 #define PKO_DOORBELL_WRITE_SUB_DID	0x0000070000000000ULL
401 #define PKO_DOORBELL_WRITE_39_16	0x000000ffffff0000ULL
402 #define PKO_DOORBELL_WRITE_PID		0x000000000003f000ULL
403 #define PKO_DOORBELL_WRITE_QID		0x0000000000000ff8ULL
404 #define PKO_DOORBELL_WRITE_2_0		0x0000000000000007ULL
405 
406 #define PKO_DOORBELL_WRITE_WDC		0x00000000000fffffULL
407 
408 /* ---- operations */
409 
410 #define	CN30XXPKO_MAJORDID	0x0a
411 #define	CN30XXPKO_SUBDID	0x02
412 
413 #endif /* _CN30XXPKOREG_H_ */
414 
415