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Searched refs:PWR_DISP_TIMER_CONTROL2__DISP_TIMER_PULSE_WIDTH_MASK (Results 1 – 3 of 3) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/smu/
H A Dsmu_7_1_1_sh_mask.h4607 #define PWR_DISP_TIMER_CONTROL2__DISP_TIMER_PULSE_WIDTH_MASK 0x3ff macro
H A Dsmu_7_1_2_sh_mask.h5579 #define PWR_DISP_TIMER_CONTROL2__DISP_TIMER_PULSE_WIDTH_MASK 0x3ff macro
H A Dsmu_7_1_3_sh_mask.h5689 #define PWR_DISP_TIMER_CONTROL2__DISP_TIMER_PULSE_WIDTH_MASK 0x3ff macro