| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_hpo_dp_link_encoder.c | 110 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
119 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
128 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
133 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
142 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
147 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
156 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
161 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
170 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
175 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
[all …]
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| H A D | dcn31_optc.c | 196 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc31_set_drr()
205 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc31_set_drr()
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| H A D | dcn31_hpo_dp_stream_encoder.c | 669 REG_UPDATE_4(DP_SYM32_ENC_SDP_AUDIO_CONTROL0, in dcn31_hpo_dp_stream_enc_audio_disable()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_hubp.c | 138 REG_UPDATE_4(DCSURF_SURFACE_CONTROL, in hubp3_program_surface_flip_and_addr()
268 REG_UPDATE_4(DCSURF_SURFACE_CONTROL, in hubp3_program_surface_flip_and_addr()
324 REG_UPDATE_4(DCSURF_ADDR_CONFIG, in hubp3_program_tiling()
343 REG_UPDATE_4(DCSURF_SURFACE_CONTROL, in hubp3_dcc_control()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn301/ |
| H A D | dcn301_optc.c | 86 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc301_set_drr()
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| /openbsd/sys/dev/pci/drm/amd/display/dmub/src/ |
| H A D | dmub_reg.h | 103 #define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \ macro
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_hubp.c | 133 REG_UPDATE_4(CURSOR_CONTROL, in hubp32_cursor_set_attributes()
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| H A D | dcn32_optc.c | 234 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc32_setup_manual_trigger()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_opp.c | 259 REG_UPDATE_4(DPG_CONTROL, in opp2_set_disp_pattern_generator()
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| H A D | dcn20_hubp.c | 319 REG_UPDATE_4(DCSURF_TILING_CONFIG, in hubp2_program_tiling()
414 REG_UPDATE_4(DCSURF_SURFACE_CONTROL, in hubp2_dcc_control()
609 REG_UPDATE_4(CURSOR_CONTROL, in hubp2_cursor_set_attributes()
770 REG_UPDATE_4(DCSURF_SURFACE_CONTROL, in hubp2_program_surface_flip_and_addr()
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| H A D | dcn20_optc.c | 469 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc2_setup_manual_trigger()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hubp.c | 156 REG_UPDATE_4(DCSURF_TILING_CONFIG, in hubp1_program_tiling()
418 REG_UPDATE_4(DCSURF_SURFACE_CONTROL, in hubp1_program_surface_flip_and_addr()
528 REG_UPDATE_4(DCSURF_SURFACE_CONTROL, in hubp1_dcc_control()
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| H A D | dcn10_optc.c | 1028 REG_UPDATE_4(OTG_TEST_PATTERN_CONTROL, in optc1_set_test_pattern()
1128 REG_UPDATE_4(OTG_TEST_PATTERN_CONTROL, in optc1_set_test_pattern()
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| H A D | dcn10_link_encoder.c | 123 REG_UPDATE_4(DP_DPHY_CNTL, in disable_prbs_symbols()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dce/ |
| H A D | dce_dmcu.c | 186 REG_UPDATE_4(DMCU_INTERRUPT_TO_UC_EN_MASK, in dce_dmcu_setup_psr()
621 REG_UPDATE_4(DMCU_INTERRUPT_TO_UC_EN_MASK, in dcn10_dmcu_setup_psr()
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| H A D | dce_aux.c | 242 value = REG_UPDATE_4(AUX_SW_DATA, in submit_channel_request()
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| H A D | dce_mem_input.c | 623 REG_UPDATE_4(PRESCALE_GRPH_CONTROL, in program_grph_pixel_format()
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| H A D | dce_link_encoder.c | 152 REG_UPDATE_4(DP_DPHY_CNTL, in disable_prbs_symbols()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn21/ |
| H A D | dcn21_hubbub.c | 94 REG_UPDATE_4(DCHVM_CLK_CTRL, in dcn21_dchvm_init()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/inc/ |
| H A D | reg_helper.h | 245 #define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \ macro
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