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Searched refs:RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID_MASK (Results 1 – 10 of 10) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h9457 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID_MASK 0xf macro
H A Dgfx_8_1_sh_mask.h9935 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID_MASK 0xf macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h27328 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID_MASK … macro
H A Dgc_9_1_sh_mask.h28615 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID_MASK … macro
H A Dgc_9_2_1_sh_mask.h28956 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID_MASK … macro
H A Dgc_9_4_3_sh_mask.h30713 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID_MASK … macro
H A Dgc_9_4_2_sh_mask.h14529 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID_MASK … macro
H A Dgc_10_1_0_sh_mask.h39879 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID_MASK … macro
H A Dgc_11_0_3_sh_mask.h36538 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID_MASK … macro
H A Dgc_10_3_0_sh_mask.h36596 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID_MASK … macro