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Searched refs:SDMA0_CNTL__DATA_SWAP_ENABLE__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h400 #define SDMA0_CNTL__DATA_SWAP_ENABLE__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h401 #define SDMA0_CNTL__DATA_SWAP_ENABLE__SHIFT 0x3 macro
H A Dsdma0_4_2_sh_mask.h401 #define SDMA0_CNTL__DATA_SWAP_ENABLE__SHIFT … macro
H A Dsdma0_4_2_2_sh_mask.h407 #define SDMA0_CNTL__DATA_SWAP_ENABLE__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h868 #define SDMA0_CNTL__DATA_SWAP_ENABLE__SHIFT 0x3 macro
H A Doss_2_4_sh_mask.h938 #define SDMA0_CNTL__DATA_SWAP_ENABLE__SHIFT 0x3 macro
H A Doss_3_0_1_sh_mask.h952 #define SDMA0_CNTL__DATA_SWAP_ENABLE__SHIFT 0x3 macro
H A Doss_3_0_sh_mask.h1458 #define SDMA0_CNTL__DATA_SWAP_ENABLE__SHIFT 0x3 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h92 #define SDMA0_CNTL__DATA_SWAP_ENABLE__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h46 #define SDMA0_CNTL__DATA_SWAP_ENABLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h93 #define SDMA0_CNTL__DATA_SWAP_ENABLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h46 #define SDMA0_CNTL__DATA_SWAP_ENABLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h88 #define SDMA0_CNTL__DATA_SWAP_ENABLE__SHIFT … macro