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Searched refs:SDMA0_STATUS3_REG__GCR_IDLE__SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h719 #define SDMA0_STATUS3_REG__GCR_IDLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h717 #define SDMA0_STATUS3_REG__GCR_IDLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h739 #define SDMA0_STATUS3_REG__GCR_IDLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h697 #define SDMA0_STATUS3_REG__GCR_IDLE__SHIFT … macro