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Searched refs:SDMA0_STATUS_REG__INT_IDLE__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h511 #define SDMA0_STATUS_REG__INT_IDLE__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h512 #define SDMA0_STATUS_REG__INT_IDLE__SHIFT 0x1e macro
H A Dsdma0_4_2_sh_mask.h512 #define SDMA0_STATUS_REG__INT_IDLE__SHIFT … macro
H A Dsdma0_4_2_2_sh_mask.h518 #define SDMA0_STATUS_REG__INT_IDLE__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h960 #define SDMA0_STATUS_REG__INT_IDLE__SHIFT 0x1e macro
H A Doss_2_4_sh_mask.h1044 #define SDMA0_STATUS_REG__INT_IDLE__SHIFT 0x1e macro
H A Doss_3_0_1_sh_mask.h1062 #define SDMA0_STATUS_REG__INT_IDLE__SHIFT 0x1e macro
H A Doss_3_0_sh_mask.h1568 #define SDMA0_STATUS_REG__INT_IDLE__SHIFT 0x1e macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h203 #define SDMA0_STATUS_REG__INT_IDLE__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h188 #define SDMA0_STATUS_REG__INT_IDLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h220 #define SDMA0_STATUS_REG__INT_IDLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h196 #define SDMA0_STATUS_REG__INT_IDLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h221 #define SDMA0_STATUS_REG__INT_IDLE__SHIFT … macro