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Searched refs:SDMA0_UTCL1_WR_STATUS__ATOMIC_OP_MASK (Results 1 – 2 of 2) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h568 #define SDMA0_UTCL1_WR_STATUS__ATOMIC_OP_MASK … macro
H A Dgc_10_3_0_sh_mask.h533 #define SDMA0_UTCL1_WR_STATUS__ATOMIC_OP_MASK … macro