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Searched refs:SDMA1_EDC_COUNTER__SDMA_MC_WR_ADDR_FIFO_SED__SHIFT (Results 1 – 7 of 7) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h640 #define SDMA1_EDC_COUNTER__SDMA_MC_WR_ADDR_FIFO_SED__SHIFT 0x10 macro
H A Dsdma1_4_2_2_sh_mask.h651 #define SDMA1_EDC_COUNTER__SDMA_MC_WR_ADDR_FIFO_SED__SHIFT … macro
H A Dsdma1_4_2_sh_mask.h647 #define SDMA1_EDC_COUNTER__SDMA_MC_WR_ADDR_FIFO_SED__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2878 #define SDMA1_EDC_COUNTER__SDMA_MC_WR_ADDR_FIFO_SED__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h3126 #define SDMA1_EDC_COUNTER__SDMA_MC_WR_ADDR_FIFO_SED__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h2959 #define SDMA1_EDC_COUNTER__SDMA_MC_WR_ADDR_FIFO_SED__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h3235 #define SDMA1_EDC_COUNTER__SDMA_MC_WR_ADDR_FIFO_SED__SHIFT … macro