Home
last modified time | relevance | path

Searched refs:SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER_MASK (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h468 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER_MASK 0xFFFFFFFFL macro
H A Dsdma1_4_2_2_sh_mask.h470 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER_MASK … macro
H A Dsdma1_4_2_sh_mask.h466 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER_MASK … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1419 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER_MASK 0xffffffff macro
H A Doss_2_4_sh_mask.h1579 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER_MASK 0xffffffff macro
H A Doss_3_0_1_sh_mask.h2097 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER_MASK 0xffffffff macro
H A Doss_3_0_sh_mask.h2401 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER_MASK 0xffffffff macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h2973 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER_MASK … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2682 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER_MASK … macro
H A Dgc_10_1_0_sh_mask.h2948 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER_MASK … macro
H A Dgc_11_0_3_sh_mask.h2751 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER_MASK … macro
H A Dgc_10_3_0_sh_mask.h3057 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER_MASK … macro