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Searched refs:SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h467 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 0x0 macro
H A Dsdma1_4_2_2_sh_mask.h469 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT … macro
H A Dsdma1_4_2_sh_mask.h465 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1420 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 0x0 macro
H A Doss_2_4_sh_mask.h1580 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 0x0 macro
H A Doss_3_0_1_sh_mask.h2098 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 0x0 macro
H A Doss_3_0_sh_mask.h2402 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 0x0 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h2972 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2681 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h2947 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h2750 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h3056 #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT … macro