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Searched refs:SDMA2_RLC3_STATUS__WPTR_UPDATE_FAIL_COUNT__SHIFT (Results 1 – 3 of 3) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma2/
H A Dsdma2_4_2_2_sh_mask.h2119 #define SDMA2_RLC3_STATUS__WPTR_UPDATE_FAIL_COUNT__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h7511 #define SDMA2_RLC3_STATUS__WPTR_UPDATE_FAIL_COUNT__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_3_0_sh_mask.h40710 #define SDMA2_RLC3_STATUS__WPTR_UPDATE_FAIL_COUNT__SHIFT … macro