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Searched refs:SHUB_PF0_VF_FLR_RST__PF0_VF8_FLR_RST__SHIFT (Results 1 – 5 of 5) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_sh_mask.h1914 #define SHUB_PF0_VF_FLR_RST__PF0_VF8_FLR_RST__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h21745 #define SHUB_PF0_VF_FLR_RST__PF0_VF8_FLR_RST__SHIFT … macro
H A Dnbio_2_3_sh_mask.h13026 #define SHUB_PF0_VF_FLR_RST__PF0_VF8_FLR_RST__SHIFT … macro
H A Dnbio_7_0_sh_mask.h29019 #define SHUB_PF0_VF_FLR_RST__PF0_VF8_FLR_RST__SHIFT … macro
H A Dnbio_6_1_sh_mask.h19130 #define SHUB_PF0_VF_FLR_RST__PF0_VF8_FLR_RST__SHIFT … macro