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Searched refs:SPI_DSM_CNTL2__SPI_SR_MEM_ENABLE_ERROR_INJECT_MASK (Results 1 – 9 of 9) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h4185 #define SPI_DSM_CNTL2__SPI_SR_MEM_ENABLE_ERROR_INJECT_MASK … macro
H A Dgc_9_1_sh_mask.h3717 #define SPI_DSM_CNTL2__SPI_SR_MEM_ENABLE_ERROR_INJECT_MASK … macro
H A Dgc_9_2_1_sh_mask.h3581 #define SPI_DSM_CNTL2__SPI_SR_MEM_ENABLE_ERROR_INJECT_MASK … macro
H A Dgc_9_4_3_sh_mask.h4440 #define SPI_DSM_CNTL2__SPI_SR_MEM_ENABLE_ERROR_INJECT_MASK … macro
H A Dgc_9_4_2_sh_mask.h24536 #define SPI_DSM_CNTL2__SPI_SR_MEM_ENABLE_ERROR_INJECT_MASK … macro
H A Dgc_11_0_0_sh_mask.h7291 #define SPI_DSM_CNTL2__SPI_SR_MEM_ENABLE_ERROR_INJECT_MASK … macro
H A Dgc_10_1_0_sh_mask.h8458 #define SPI_DSM_CNTL2__SPI_SR_MEM_ENABLE_ERROR_INJECT_MASK … macro
H A Dgc_11_0_3_sh_mask.h8782 #define SPI_DSM_CNTL2__SPI_SR_MEM_ENABLE_ERROR_INJECT_MASK … macro
H A Dgc_10_3_0_sh_mask.h8777 #define SPI_DSM_CNTL2__SPI_SR_MEM_ENABLE_ERROR_INJECT_MASK … macro