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Searched refs:SPI_PERFCOUNTER0_SELECT__CNTR_MODE_MASK (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7618 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE_MASK 0x00f00000L macro
H A Dgfx_7_2_sh_mask.h9167 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE_MASK 0xf00000 macro
H A Dgfx_8_0_sh_mask.h10887 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE_MASK 0xf00000 macro
H A Dgfx_8_1_sh_mask.h11285 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE_MASK 0xf00000 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21549 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE_MASK … macro
H A Dgc_9_1_sh_mask.h22860 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE_MASK … macro
H A Dgc_9_2_1_sh_mask.h22827 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE_MASK … macro
H A Dgc_9_4_3_sh_mask.h25022 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE_MASK … macro
H A Dgc_9_4_2_sh_mask.h16642 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE_MASK … macro
H A Dgc_11_0_0_sh_mask.h31751 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE_MASK … macro
H A Dgc_10_1_0_sh_mask.h31498 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE_MASK … macro
H A Dgc_11_0_3_sh_mask.h34249 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE_MASK … macro
H A Dgc_10_3_0_sh_mask.h29866 #define SPI_PERFCOUNTER0_SELECT__CNTR_MODE_MASK … macro