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Searched refs:SPI_PS_INPUT_CNTL_12__DEFAULT_VAL__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7761 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL__SHIFT 0x00000008 macro
H A Dgfx_7_2_sh_mask.h8448 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL__SHIFT 0x8 macro
H A Dgfx_8_0_sh_mask.h9834 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL__SHIFT 0x8 macro
H A Dgfx_8_1_sh_mask.h10232 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL__SHIFT 0x8 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h15832 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL__SHIFT macro
H A Dgc_9_1_sh_mask.h17141 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL__SHIFT macro
H A Dgc_9_2_1_sh_mask.h17016 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL__SHIFT macro
H A Dgc_9_4_3_sh_mask.h19315 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL__SHIFT macro
H A Dgc_9_4_2_sh_mask.h9265 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL__SHIFT macro
H A Dgc_11_0_0_sh_mask.h20962 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL__SHIFT macro
H A Dgc_10_1_0_sh_mask.h23337 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL__SHIFT macro
H A Dgc_11_0_3_sh_mask.h23292 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL__SHIFT macro
H A Dgc_10_3_0_sh_mask.h21469 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL__SHIFT macro