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Searched refs:SPI_PS_INPUT_CNTL_26__DEFAULT_VAL_ATTR1__SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h10144 #define SPI_PS_INPUT_CNTL_26__DEFAULT_VAL_ATTR1__SHIFT 0x15 macro
H A Dgfx_8_1_sh_mask.h10542 #define SPI_PS_INPUT_CNTL_26__DEFAULT_VAL_ATTR1__SHIFT 0x15 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h16151 #define SPI_PS_INPUT_CNTL_26__DEFAULT_VAL_ATTR1__SHIFT macro
H A Dgc_9_1_sh_mask.h17460 #define SPI_PS_INPUT_CNTL_26__DEFAULT_VAL_ATTR1__SHIFT macro
H A Dgc_9_2_1_sh_mask.h17335 #define SPI_PS_INPUT_CNTL_26__DEFAULT_VAL_ATTR1__SHIFT macro
H A Dgc_9_4_3_sh_mask.h19634 #define SPI_PS_INPUT_CNTL_26__DEFAULT_VAL_ATTR1__SHIFT macro
H A Dgc_9_4_2_sh_mask.h9584 #define SPI_PS_INPUT_CNTL_26__DEFAULT_VAL_ATTR1__SHIFT macro
H A Dgc_11_0_0_sh_mask.h21323 #define SPI_PS_INPUT_CNTL_26__DEFAULT_VAL_ATTR1__SHIFT macro
H A Dgc_10_1_0_sh_mask.h23656 #define SPI_PS_INPUT_CNTL_26__DEFAULT_VAL_ATTR1__SHIFT macro
H A Dgc_11_0_3_sh_mask.h23653 #define SPI_PS_INPUT_CNTL_26__DEFAULT_VAL_ATTR1__SHIFT macro
H A Dgc_10_3_0_sh_mask.h21817 #define SPI_PS_INPUT_CNTL_26__DEFAULT_VAL_ATTR1__SHIFT macro