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Searched refs:SPI_PS_INPUT_CNTL_5__CYL_WRAP__SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7999 #define SPI_PS_INPUT_CNTL_5__CYL_WRAP__SHIFT 0x0000000d macro
H A Dgfx_7_2_sh_mask.h8368 #define SPI_PS_INPUT_CNTL_5__CYL_WRAP__SHIFT 0xd macro
H A Dgfx_8_0_sh_mask.h9670 #define SPI_PS_INPUT_CNTL_5__CYL_WRAP__SHIFT 0xd macro
H A Dgfx_8_1_sh_mask.h10068 #define SPI_PS_INPUT_CNTL_5__CYL_WRAP__SHIFT 0xd macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h15659 #define SPI_PS_INPUT_CNTL_5__CYL_WRAP__SHIFT … macro
H A Dgc_9_1_sh_mask.h16968 #define SPI_PS_INPUT_CNTL_5__CYL_WRAP__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h16843 #define SPI_PS_INPUT_CNTL_5__CYL_WRAP__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h19142 #define SPI_PS_INPUT_CNTL_5__CYL_WRAP__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h9092 #define SPI_PS_INPUT_CNTL_5__CYL_WRAP__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h23164 #define SPI_PS_INPUT_CNTL_5__CYL_WRAP__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h21283 #define SPI_PS_INPUT_CNTL_5__CYL_WRAP__SHIFT … macro