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Searched refs:SPI_PS_INPUT_CNTL_7__CYL_WRAP_MASK (Results 1 – 11 of 11) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h8022 #define SPI_PS_INPUT_CNTL_7__CYL_WRAP_MASK 0x0001e000L macro
H A Dgfx_7_2_sh_mask.h8391 #define SPI_PS_INPUT_CNTL_7__CYL_WRAP_MASK 0x1e000 macro
H A Dgfx_8_0_sh_mask.h9717 #define SPI_PS_INPUT_CNTL_7__CYL_WRAP_MASK 0x1e000 macro
H A Dgfx_8_1_sh_mask.h10115 #define SPI_PS_INPUT_CNTL_7__CYL_WRAP_MASK 0x1e000 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h15721 #define SPI_PS_INPUT_CNTL_7__CYL_WRAP_MASK … macro
H A Dgc_9_1_sh_mask.h17030 #define SPI_PS_INPUT_CNTL_7__CYL_WRAP_MASK … macro
H A Dgc_9_2_1_sh_mask.h16905 #define SPI_PS_INPUT_CNTL_7__CYL_WRAP_MASK … macro
H A Dgc_9_4_3_sh_mask.h19204 #define SPI_PS_INPUT_CNTL_7__CYL_WRAP_MASK … macro
H A Dgc_9_4_2_sh_mask.h9154 #define SPI_PS_INPUT_CNTL_7__CYL_WRAP_MASK … macro
H A Dgc_10_1_0_sh_mask.h23226 #define SPI_PS_INPUT_CNTL_7__CYL_WRAP_MASK … macro
H A Dgc_10_3_0_sh_mask.h21350 #define SPI_PS_INPUT_CNTL_7__CYL_WRAP_MASK … macro