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Searched refs:SQ_IND_INDEX__SIMD_ID__SHIFT (Results 1 – 15 of 15) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dgfx_v6_0.c2950 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
2962 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs()
H A Dgfx_v7_0.c4091 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
4103 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs()
H A Dgfx_v9_4_2.c1810 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
H A Dgfx_v9_4_3.c554 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
566 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs()
H A Dgfx_v8_0.c5197 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
5209 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs()
H A Dgfx_v9_0.c1746 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
1758 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs()
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9011 #define SQ_IND_INDEX__SIMD_ID__SHIFT 0x00000004 macro
H A Dgfx_7_2_sh_mask.h12402 #define SQ_IND_INDEX__SIMD_ID__SHIFT 0x4 macro
H A Dgfx_8_0_sh_mask.h14272 #define SQ_IND_INDEX__SIMD_ID__SHIFT 0x4 macro
H A Dgfx_8_1_sh_mask.h14670 #define SQ_IND_INDEX__SIMD_ID__SHIFT 0x4 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2621 #define SQ_IND_INDEX__SIMD_ID__SHIFT … macro
H A Dgc_9_1_sh_mask.h2469 #define SQ_IND_INDEX__SIMD_ID__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h2427 #define SQ_IND_INDEX__SIMD_ID__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h2820 #define SQ_IND_INDEX__SIMD_ID__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h26057 #define SQ_IND_INDEX__SIMD_ID__SHIFT … macro