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Searched refs:SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK (Results 1 – 9 of 9) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9898 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK 0x00000300L macro
H A Dgfx_7_2_sh_mask.h12457 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK 0x300 macro
H A Dgfx_8_0_sh_mask.h14327 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK 0x300 macro
H A Dgfx_8_1_sh_mask.h14725 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK 0x300 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28553 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK … macro
H A Dgc_9_1_sh_mask.h29767 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK … macro
H A Dgc_9_2_1_sh_mask.h30095 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK … macro
H A Dgc_9_4_3_sh_mask.h31466 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK … macro
H A Dgc_9_4_2_sh_mask.h32826 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK … macro