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Searched refs:STM (Results 1 – 25 of 31) sorted by relevance

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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPUAsmPrinter.cpp232 if (STM.isAmdHsaOS()) in emitFunctionBodyStart()
445 if (STM.hasGFX90AInsts()) in getAmdhsaKernelDescriptor()
472 if (!STM.isAmdHsaOS() && !STM.isAmdPalOS()) { in runOnMachineFunction()
482 if (STM.isAmdPalOS()) { in runOnMachineFunction()
492 if (STM.dumpCode()) { in runOnMachineFunction()
558 if (STM.hasGFX90AInsts()) in runOnMachineFunction()
698 STM.getMaxWaveScratchSize() / STM.getWavefrontSize(); in getSIProgramInfo()
918 S_00B84C_TRAP_HANDLER(STM.isAmdHsaOS() ? 0 : STM.isTrapHandlerEnabled()) | in getSIProgramInfo()
1023 if (STM.hasMAIInsts()) { in EmitPALMetadata()
1046 if (STM.isWave32()) in EmitPALMetadata()
[all …]
H A DR600AsmPrinter.cpp47 const R600Subtarget &STM = MF.getSubtarget<R600Subtarget>(); in EmitProgramInfoR600() local
48 const R600RegisterInfo *RI = STM.getRegisterInfo(); in EmitProgramInfoR600()
71 if (STM.getGeneration() >= AMDGPUSubtarget::EVERGREEN) { in EmitProgramInfoR600()
H A DAMDGPUHSAMetadataStreamer.cpp191 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getHSACodeProps() local
200 HSACodeProps.mKernargSegmentSize = STM.getKernArgSegmentSize(F, in getHSACodeProps()
207 HSACodeProps.mWavefrontSize = STM.getWavefrontSize(); in getHSACodeProps()
212 HSACodeProps.mIsXNACKEnabled = STM.isXNACKEnabled(); in getHSACodeProps()
880 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getHSAKernelProps() local
888 STM.getKernArgSegmentSize(F, MaxKernArgAlign)); in getHSAKernelProps()
896 if (AMDGPU::getAmdhsaCodeObjectVersion() >= 5 && STM.supportsWGP()) in getHSAKernelProps()
904 Kern.getDocument()->getNode(STM.getWavefrontSize()); in getHSAKernelProps()
909 if (STM.hasMAIInsts()) { in getHSAKernelProps()
H A DSILoadStoreOptimizer.cpp200 const GCNSubtarget *STM = nullptr; member in __anon62d12dcc0111::SILoadStoreOptimizer
730 EltSize = AMDGPU::convertSMRDOffsetUnits(*LSO.STM, 4); in setMI()
1104 if (!widthsFit(*STM, CI, Paired) || !offsetsCanBeCombined(CI, *STM, Paired)) in checkAndPrepareMerge()
1134 offsetsCanBeCombined(CI, *STM, Paired, true); in checkAndPrepareMerge()
1139 if (STM->ldsRequiresM0Init()) in read2Opcode()
1145 if (STM->ldsRequiresM0Init()) in read2ST64Opcode()
1234 if (STM->ldsRequiresM0Init()) in write2Opcode()
1241 if (STM->ldsRequiresM0Init()) in write2ST64Opcode()
2451 STM = &MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction()
2452 if (!STM->loadStoreOptEnabled()) in runOnMachineFunction()
[all …]
H A DSIMemoryLegalizer.cpp1116 const GCNSubtarget &STM = MBB.getParent()->getSubtarget<GCNSubtarget>(); in insertAcquire() local
1118 const unsigned InvalidateL1 = STM.isAmdPalOS() || STM.isMesa3DOS() in insertAcquire()
/openbsd/gnu/llvm/clang/lib/Tooling/Syntax/
H A DComputeReplacements.cpp22 const syntax::TokenBufferTokenManager &STM, in enumerateTokenSpans() argument
25 Enumerator(const syntax::TokenBufferTokenManager &STM, in enumerateTokenSpans()
27 : STM(STM), SpanBegin(nullptr), SpanEnd(nullptr), SpanIsOriginal(false), in enumerateTokenSpans()
47 if (SpanEnd == STM.getToken(L->getTokenKey()) && in enumerateTokenSpans()
57 SpanBegin = STM.getToken(L->getTokenKey()); in enumerateTokenSpans()
62 const syntax::TokenBufferTokenManager &STM; in enumerateTokenSpans() member
69 return Enumerator(STM, Callback).run(Root); in enumerateTokenSpans()
72 syntax::FileRange rangeOfExpanded(const syntax::TokenBufferTokenManager &STM, in rangeOfExpanded() argument
74 const auto &Buffer = STM.tokenBuffer(); in rangeOfExpanded()
75 const auto &SM = STM.sourceManager(); in rangeOfExpanded()
H A DBuildTree.cpp668 std::string str(const syntax::TokenBufferTokenManager &STM) const { in str()
674 : STM.tokenBuffer().expandedTokens().end() - It->first; in str()
678 It->first->text(STM.sourceManager()), CoveredTokens)); in str()
679 R += It->second->dump(STM); in str()
/openbsd/usr.bin/file/magdir/
H A Dvaried.out40 # Generated by the "examples" in STM's ST40 devkit, and derived code.
/openbsd/gnu/llvm/llvm/lib/Target/ARM/
H A DARMScheduleM7.td240 // time for STM cannot be overridden because it is a variadic source operand.
245 (instregex "(t|t2)STM(DB|IA)$")>;
249 (instregex "(t|t2)STM(DB|IA)_UPD$", "tPUSH")>;
H A DARMScheduleM4.td62 def : M4UnitL1I<(instregex "(t|t2)STM")>;
H A DARMScheduleR52.td506 (instregex "STM(IB|IA|DB|DA)$", "(t2|sys|t)STM(IB|IA|DB|DA)$")>;
508 (instregex "STM(IB|IA|DB|DA)_UPD", "(t2|sys|t)STM(IB|IA|DB|DA)_UPD",
H A DARMScheduleSwift.td535 (instregex "STM(IB|IA|DB|DA)$", "(t2|sys|t)STM(IB|IA|DB|DA)$")>;
537 (instregex "STM(IB|IA|DB|DA)_UPD", "(t2|sys|t)STM(IB|IA|DB|DA)_UPD",
H A DARMBaseInstrInfo.cpp1639 MachineInstrBuilder LDM, STM; in expandMEMCPY() local
1652 STM = BuildMI(*BB, MI, dl, TII->get(isThumb2 ? ARM::t2STMIA_UPD in expandMEMCPY()
1657 STM = BuildMI(*BB, MI, dl, TII->get(isThumb2 ? ARM::t2STMIA : ARM::STMIA)); in expandMEMCPY()
1664 STM.add(STBase).add(predOps(ARMCC::AL)); in expandMEMCPY()
1679 STM.addReg(Reg, RegState::Kill); in expandMEMCPY()
H A DARMScheduleA57.td711 def : InstRW<[A57WriteSTM], (instregex "(t2|sys|t)?STM(IA|DA|DB|IB)$")>;
713 (instregex "(t2|sys|t)?STM(IA_UPD|DA_UPD|DB_UPD|IB_UPD)", "tPUSH")>;
H A DARMInstrThumb.td851 // There is no non-writeback version of STM for Thumb.
1661 // post-inc STR -> STM r0!, {r1}. The layout of this (because it doesn't def
/openbsd/gnu/gcc/gcc/config/arm/
H A Darm1020e.md181 ;; On a LDM/STM operation, the LSU pipeline iterates until all of the
192 ;; a register dependency; the dependency is cleared as soon as the LDM/STM
H A Darm1026ejs.md181 ;; On a LDM/STM operation, the LSU pipeline iterates until all of the
/openbsd/gnu/llvm/llvm/lib/IR/
H A DDataLayout.cpp685 StructLayoutMap *STM = static_cast<StructLayoutMap*>(LayoutMap); in getStructLayout() local
686 StructLayout *&SL = (*STM)[Ty]; in getStructLayout()
/openbsd/gnu/usr.bin/gcc/gcc/config/i370/
H A Di370.md651 return \"STM %1,%N1,%0\";
708 return \"STM %1,%N1,%0\";
737 return \"STM %1,%N1,%0\";
1154 return \"STM %1,%N1,140(13)\;LD %0,140(,13)\";
1188 return \"STM %1,%N1,%0\";
1216 return \"STM %1,%N1,140(13)\;LD %0,140(,13)\";
1248 return \"STM %1,%N1,%0\";
/openbsd/gnu/llvm/libunwind/src/
H A DUnwindRegistersSave.S775 @ . the pc (r15) cannot be in the list in an STM instruction
/openbsd/gnu/llvm/llvm/lib/Target/SystemZ/
H A DSystemZScheduleZ196.td256 def : InstRW<[WLat1, LSU2, FXU5, GroupAlone], (instregex "STM(H|Y|G)?$")>;
H A DSystemZScheduleZEC12.td267 def : InstRW<[WLat1, LSU2, FXU5, GroupAlone], (instregex "STM(H|Y|G)?$")>;
H A DSystemZScheduleZ13.td293 def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>;
H A DSystemZScheduleZ16.td298 def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>;
H A DSystemZScheduleZ14.td294 def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>;

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