1 /* $OpenBSD: tc_machdep.h,v 1.3 2002/05/02 22:56:06 miod Exp $ */ 2 /* $NetBSD: tc_machdep.h,v 1.4 2000/06/01 00:04:50 cgd Exp $ */ 3 4 /* 5 * Copyright (c) 1994, 1995 Carnegie-Mellon University. 6 * All rights reserved. 7 * 8 * Author: Chris G. Demetriou 9 * 10 * Permission to use, copy, modify and distribute this software and 11 * its documentation is hereby granted, provided that both the copyright 12 * notice and this permission notice appear in all copies of the 13 * software, derivative works or modified versions, and any portions 14 * thereof, and that both notices appear in supporting documentation. 15 * 16 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 17 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 18 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 19 * 20 * Carnegie Mellon requests users of this software to return to 21 * 22 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 23 * School of Computer Science 24 * Carnegie Mellon University 25 * Pittsburgh PA 15213-3890 26 * 27 * any improvements or extensions that they make and grant Carnegie the 28 * rights to redistribute these changes. 29 */ 30 31 /* 32 * Machine-specific definitions for TurboChannel support. 33 * 34 * This file must typedef the following types: 35 * 36 * tc_addr_t TurboChannel bus address 37 * tc_offset_t TurboChannel bus address difference (offset) 38 * 39 * This file must prototype or define the following functions 40 * or macros (one or more of which may be no-ops): 41 * 42 * tc_mb() read/write memory barrier (any CPU<->memory 43 * reads/writes before must complete before any 44 * CPU<->memory reads/writes after). 45 * tc_wmb() write memory barrier (any CPU<->memory writes 46 * before must complete before any CPU<->memory 47 * writes after). 48 * tc_syncbus() sync TC bus; make sure CPU writes are 49 * propagated across the TurboChannel bus. 50 * tc_badaddr() return non-zero if the given address is invalid. 51 * TC_DENSE_TO_SPARSE() 52 * convert the given physical address in 53 * TurboChannel dense space to the corresponding 54 * address in TurboChannel sparse space. 55 * TC_PHYS_TO_UNCACHED() 56 * convert the given system memory physical address 57 * to the physical address of the corresponding 58 * region that is not cached. 59 */ 60 61 typedef u_int64_t tc_addr_t; 62 typedef int32_t tc_offset_t; 63 64 #define tc_mb() alpha_mb() 65 #define tc_wmb() alpha_wmb() 66 67 /* 68 * A junk address to read from, to make sure writes are complete. See 69 * System Programmer's Manual, section 9.3 (p. 9-4), and sacrifice a 70 * chicken. 71 */ 72 #define tc_syncbus() \ 73 do { \ 74 volatile u_int32_t no_optimize; \ 75 no_optimize = \ 76 *(volatile u_int32_t *)ALPHA_PHYS_TO_K0SEG(0x00000001f0080220); \ 77 } while (0) 78 79 #define tc_badaddr(tcaddr) \ 80 badaddr((void *)(tcaddr), sizeof (u_int32_t)) 81 82 #define TC_SPACE_IND 0xffffffffe0000003 83 #define TC_SPACE_DENSE 0x0000000000000000 84 #define TC_SPACE_DENSE_OFFSET 0x0000000007fffffc 85 #define TC_SPACE_SPARSE 0x0000000010000000 86 #define TC_SPACE_SPARSE_OFFSET 0x000000000ffffff8 87 88 #define TC_DENSE_TO_SPARSE(addr) \ 89 (((addr) & TC_SPACE_IND) | TC_SPACE_SPARSE | \ 90 (((addr) & TC_SPACE_DENSE_OFFSET) << 1)) 91 92 #define TC_PHYS_TO_UNCACHED(addr) \ 93 (addr) 94 95 /* 96 * These functions are private, and may not be called by 97 * machine-independent code. 98 */ 99 bus_space_tag_t tc_bus_mem_init(void *memv); 100 void tc_dma_init(void); 101 102 /* 103 * Address of scatter/gather SRAM on the 3000/500-series. 104 * 105 * There is room for 32K entries, yielding 256M of sgva space. 106 * The page table is readable in both dense and sparse space. 107 * The page table is writable only in sparse space. 108 * 109 * In sparse space, the 32-bit PTEs are followed by 32-bits 110 * of pad. 111 */ 112 #define TC_SGSRAM_DENSE 0x0000001c2800000UL 113 #define TC_SGSRAM_SPARSE 0x0000001d5000000UL 114