Home
last modified time | relevance | path

Searched refs:TRN1 (Results 1 – 6 of 6) sorted by relevance

/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h201 TRN1, enumerator
H A DAArch64SchedKryoDetails.td2329 (instregex "((TRN1|TRN2|ZIP1|UZP1|UZP2)v2i64|ZIP2(v2i64|v4i32|v8i16|v16i8))")>;
2335 (instregex "(TRN1|TRN2)(v4i32|v8i16|v16i8)")>;
2341 (instregex "(TRN1|TRN2)(v2i32|v4i16|v8i8)")>;
H A DAArch64SchedFalkorDetails.td920 def : InstRW<[FalkorWr_1VXVY_1cyc], (instregex "^(TRN1|TRN2|ZIP1|UZP1|UZP2|ZIP2|XTN)(v2i32|v2i64|…
H A DAArch64SchedThunderX3T110.td1639 def : InstRW<[THX3T110Write_5Cyc_F0123], (instregex "^TRN1", "^TRN2")>;
H A DAArch64ISelLowering.cpp2383 MAKE_CASE(AArch64ISD::TRN1) in getTargetNodeName()
5018 return DAG.getNode(AArch64ISD::TRN1, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
11161 return DAG.getNode(AArch64ISD::TRN1, dl, DAG.getVTList(VT, VT), OpLHS, in GeneratePerfectShuffle()
11566 unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2; in LowerVECTOR_SHUFFLE()
11579 unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2; in LowerVECTOR_SHUFFLE()
23771 unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2; in LowerFixedLengthVECTOR_SHUFFLEToSVE()
23781 unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2; in LowerFixedLengthVECTOR_SHUFFLEToSVE()
H A DAArch64InstrInfo.td649 def AArch64trn1 : SDNode<"AArch64ISD::TRN1", SDT_AArch64Zip>;
5587 defm TRN1 : SIMDZipVector<0b010, "trn1", AArch64trn1>;