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Searched refs:UNINDEXED (Results 1 – 18 of 18) sorted by relevance

/openbsd/gnu/llvm/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h2336 bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
2339 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
2473 bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
2476 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
2646 bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
2649 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
3052 Ld->getAddressingMode() == ISD::UNINDEXED;
3082 cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
3090 St->getAddressingMode() == ISD::UNINDEXED;
3096 cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
H A DISDOpcodes.h1377 enum MemIndexedMode { UNINDEXED = 0, PRE_INC, PRE_DEC, POST_INC, POST_DEC }; enumerator
H A DBasicTTIImpl.h194 return ISD::UNINDEXED; in getISDIndexedMode()
/openbsd/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp8046 bool Indexed = AM != ISD::UNINDEXED; in getLoad()
8158 dl.getIROrder(), VTs, ISD::UNINDEXED, false, VT, MMO)); in getStore()
8167 ISD::UNINDEXED, false, VT, MMO); in getStore()
8225 dl.getIROrder(), VTs, ISD::UNINDEXED, true, SVT, MMO)); in getTruncStore()
8302 bool Indexed = AM != ISD::UNINDEXED; in getLoadVP()
8396 bool Indexed = AM != ISD::UNINDEXED; in getStoreVP()
8457 EVL, VT, MMO, ISD::UNINDEXED, in getTruncStoreVP()
8553 bool Indexed = AM != ISD::UNINDEXED; in getStridedLoadVP()
8650 bool Indexed = AM != ISD::UNINDEXED; in getStridedStoreVP()
8872 bool Indexed = AM != ISD::UNINDEXED; in getMaskedLoad()
[all …]
H A DLegalizeVectorTypes.cpp372 ISD::UNINDEXED, N->getExtensionType(), in ScalarizeVecRes_LOAD()
1851 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset, in SplitVecRes_LOAD()
1858 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset, MPI, in SplitVecRes_LOAD()
H A DSelectionDAGBuilder.cpp4390 ISD::UNINDEXED, false /* Truncating */, IsCompressing); in visitMaskedStore()
4564 ISD::UNINDEXED, ISD::NON_EXTLOAD, IsExpanding); in visitMaskedLoad()
7558 OpValues[2], OpValues[3], VT, MMO, ISD::UNINDEXED, in visitVPStore()
7647 OpValues[4], VT, MMO, ISD::UNINDEXED, /*IsTruncating*/ false, in visitVPStridedStore()
H A DTargetLowering.cpp9037 assert(LD->getAddressingMode() == ISD::UNINDEXED && in expandUnalignedLoad()
9189 assert(ST->getAddressingMode() == ISD::UNINDEXED && in expandUnalignedStore()
H A DDAGCombiner.cpp16882 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPreIndexedLoadStore()
17176 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPostIndexedLoadStore()
17218 assert(AM != ISD::UNINDEXED); in SplitIndexingFromLoad()
/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp3019 Thru.first, SingleTy, MOp0, ISD::UNINDEXED, in SplitHvxMemOp()
3023 Thru.second, SingleTy, MOp1, ISD::UNINDEXED, in SplitHvxMemOp()
3034 ISD::UNINDEXED, false, false); in SplitHvxMemOp()
3037 ISD::UNINDEXED, false, false); in SplitHvxMemOp()
3072 ISD::UNINDEXED, ISD::NON_EXTLOAD, false); in WidenHvxLoad()
3108 MemOp, ISD::UNINDEXED, false, false); in WidenHvxStore()
H A DHexagonISelDAGToDAG.cpp456 if (AM != ISD::UNINDEXED) { in SelectLoad()
565 if (AM != ISD::UNINDEXED) { in SelectStore()
/openbsd/gnu/llvm/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp1593 if (AM == ISD::UNINDEXED) in tryARMIndexedLoad()
1699 if (AM == ISD::UNINDEXED) in tryT2IndexedLoad()
1758 if (AM == ISD::UNINDEXED) in tryMVEIndexedLoad()
1774 if (AM == ISD::UNINDEXED) in tryMVEIndexedLoad()
H A DARMISelLowering.cpp17615 DAG.getLoad(ISD::UNINDEXED, NewExtType, NewToVT, DL, Ch, NewPtr, Offset, in PerformSplittingToWideningLoad()
18539 DAG.getLoad(ISD::UNINDEXED, NewExtType, NewToVT, DL, Ch, NewPtr, Offset, in PerformSplittingMVEEXTToWideningLoad()
/openbsd/gnu/llvm/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td842 // cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
843 // cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1518 ISD::UNINDEXED, Ext, VT, DL, Chain, in LowerFormalArguments()
H A DSIISelLowering.cpp8647 ISD::UNINDEXED, ISD::NON_EXTLOAD, MVT::i32, SL, Ld->getChain(), Ptr, in widenLoad()
/openbsd/gnu/llvm/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp833 LD->getAddressingMode() != ISD::UNINDEXED || in isCalleeLoad()
H A DX86ISelLowering.cpp28694 MemVT, MemIntr->getMemOperand(), ISD::UNINDEXED, in LowerINTRINSIC_W_CHAIN()
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp18532 ISD::UNINDEXED, ISD::NON_EXTLOAD, false); in performLDNT1Combine()
18604 ISD::UNINDEXED, false, false); in performSTNT1Combine()