Searched refs:VINTERP (Results 1 – 8 of 8) sorted by relevance
1 //===-- VINTERPInstructions.td - VINTERP Instruction Definitions ----------===//10 // VINTERP encoding25 let Inst{25-24} = 0x1; // VINTERP sub-encoding45 // VOP3 VINTERP54 let VINTERP = 1;59 let VINTERP = 1;99 // VINTERP Pseudo Instructions172 // VINTERP Real Instructions
54 // VINTERP instruction format.55 field bit VINTERP = 0;189 let TSFlags{27} = VINTERP;
70 VINTERP = 1 << 27, enumerator
703 return MI.getDesc().TSFlags & SIInstrFlags::VINTERP; in isVINTERP()707 return get(Opcode).TSFlags & SIInstrFlags::VINTERP; in isVINTERP()
123 Only VOP3, VOP3P and VINTERP instructions may access all 512 registers (using :ref:`op_sel<amdgpu_s…
1081 VINTRP/VINTERP/LDSDIR Modifiers
681 if (Res && (MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::VINTERP)) in getInstruction()
1040 VINTERP section in Instructions