Searched refs:VS1Constraint (Results 1 – 3 of 3) sorted by relevance
57 def VS1Constraint : RISCVVConstraint<0b010>;92 VS1Constraint.Value,94 def WidenW : RISCVVConstraint<!or(VS1Constraint.Value,103 VS1Constraint.Value,106 VS1Constraint.Value)>;
111 VS1Constraint = 0b010, enumerator
2622 if ((Constraints & RISCVII::VS1Constraint) && (Inst.getOperand(2).isReg())) { in validateInstruction()