/openbsd/gnu/llvm/llvm/include/llvm/IR/ |
H A D | LegacyPassNameParser.h | 89 static int ValCompare(const PassNameParser::OptionInfo *VT1, in ValCompare() argument 91 return VT1->Name.compare(VT2->Name); in ValCompare()
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/openbsd/gnu/llvm/llvm/lib/Target/BPF/ |
H A D | BPFISelLowering.h | 141 bool isTruncateFree(EVT VT1, EVT VT2) const override; 145 bool isZExtFree(EVT VT1, EVT VT2) const override;
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H A D | BPFISelLowering.cpp | 200 bool BPFTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree() argument 201 if (!VT1.isInteger() || !VT2.isInteger()) in isTruncateFree() 203 unsigned NumBits1 = VT1.getSizeInBits(); in isTruncateFree() 216 bool BPFTargetLowering::isZExtFree(EVT VT1, EVT VT2) const { in isZExtFree() argument 217 if (!getHasAlu32() || !VT1.isInteger() || !VT2.isInteger()) in isZExtFree() 219 unsigned NumBits1 = VT1.getSizeInBits(); in isZExtFree()
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/openbsd/gnu/llvm/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.h | 117 bool isTruncateFree(EVT VT1, EVT VT2) const override; 128 bool isZExtFree(EVT VT1, EVT VT2) const override;
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H A D | MSP430ISelLowering.cpp | 1399 bool MSP430TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree() argument 1400 if (!VT1.isInteger() || !VT2.isInteger()) in isTruncateFree() 1403 return (VT1.getFixedSizeInBits() > VT2.getFixedSizeInBits()); in isTruncateFree() 1411 bool MSP430TargetLowering::isZExtFree(EVT VT1, EVT VT2) const { in isZExtFree() argument 1413 return false && VT1 == MVT::i8 && VT2 == MVT::i16; in isZExtFree()
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/openbsd/gnu/llvm/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAG.h | 637 SDVTList getVTList(EVT VT1, EVT VT2); 638 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3); 639 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4); 1668 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2); 1669 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, 1671 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, 1673 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, 1703 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1, 1705 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1, 1707 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1, [all …]
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H A D | TargetLowering.h | 1558 EVT VT1; in getRegisterType() local 1561 (void)getVectorTypeBreakdown(Context, VT, VT1, in getRegisterType() 1591 EVT VT1; variable 1594 return getVectorTypeBreakdown(Context, VT, VT1, NumIntermediates, VT2);
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/openbsd/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAG.cpp | 9472 ID.AddInteger(VT1.getRawBits()); in getVTList() 9479 Array[0] = VT1; in getVTList() 9490 ID.AddInteger(VT1.getRawBits()); in getVTList() 9498 Array[0] = VT1; in getVTList() 9510 ID.AddInteger(VT1.getRawBits()); in getVTList() 9519 Array[0] = VT1; in getVTList() 9732 SDVTList VTs = getVTList(VT1, VT2); in SelectNodeTo() 9738 SDVTList VTs = getVTList(VT1, VT2); in SelectNodeTo() 9752 SDVTList VTs = getVTList(VT1, VT2); in SelectNodeTo() 9940 SDVTList VTs = getVTList(VT1, VT2); in getMachineNode() [all …]
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H A D | LegalizeVectorTypes.cpp | 5505 EVT VT1 = getSetCCResultType(getSETCCOperandType(SETCC1)); in WidenVSELECTMask() local 5507 unsigned ScalarBits1 = VT1.getScalarSizeInBits(); in WidenVSELECTMask() 5514 EVT NarrowVT = ((ScalarBits0 < ScalarBits1) ? VT0 : VT1); in WidenVSELECTMask() 5515 EVT WideVT = ((NarrowVT == VT0) ? VT1 : VT0); in WidenVSELECTMask() 5528 SETCC1 = convertMask(SETCC1, VT1, MaskVT); in WidenVSELECTMask()
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H A D | DAGCombiner.cpp | 10166 EVT VT1 = Op0.getOperand(0).getValueType(); in foldABSToABD() local 10173 if (VT1 == VT2 && TLI.isOperationLegalOrCustom(ABDOpcode, VT1)) { in foldABSToABD() 10176 SDValue ABD = DAG.getNode(ABDOpcode, SDLoc(N), VT1, Op0, Op1); in foldABSToABD()
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/openbsd/gnu/llvm/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.h | 1318 bool isTruncateFree(EVT VT1, EVT VT2) const override; 1331 bool isZExtFree(EVT VT1, EVT VT2) const override; 1351 bool isNarrowingProfitable(EVT VT1, EVT VT2) const override;
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H A D | X86ISelLowering.cpp | 34975 if (!VT1.isScalarInteger() || !VT2.isScalarInteger()) in isTruncateFree() 34977 unsigned NumBits1 = VT1.getSizeInBits(); in isTruncateFree() 34993 EVT VT1 = Val.getValueType(); in isZExtFree() local 34994 if (isZExtFree(VT1, VT2)) in isZExtFree() 35000 if (!VT1.isSimple() || !VT1.isInteger() || in isZExtFree() 35004 switch (VT1.getSimpleVT().SimpleTy) { in isZExtFree() 35117 return !(VT1 == MVT::i32 && VT2 == MVT::i16); in isNarrowingProfitable() 38966 MVT VT1 = V1.getSimpleValueType(); in combineX86ShuffleChain() local 38968 assert((RootSizeInBits % VT1.getSizeInBits()) == 0 && in combineX86ShuffleChain() 39010 if (VT1 == VT2 && VT1.getSizeInBits() == RootSizeInBits && VT1.isVector()) { in combineX86ShuffleChain() [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 615 bool isTruncateFree(EVT VT1, EVT VT2) const override; 620 bool isZExtFree(EVT VT1, EVT VT2) const override;
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H A D | AArch64ISelLowering.cpp | 3766 EVT VT1 = Op.getValue(1).getValueType(); in lowerADDSUBCARRY() local 3777 SDVTList VTs = DAG.getVTList(VT0, VT1); in lowerADDSUBCARRY() 3783 IsSigned ? overflowFlagToValue(Sum.getValue(1), VT1, DAG) in lowerADDSUBCARRY() 13616 if (VT1.isVector() || VT2.isVector() || !VT1.isInteger() || !VT2.isInteger()) in isTruncateFree() 13618 uint64_t NumBits1 = VT1.getFixedSizeInBits(); in isTruncateFree() 13660 if (VT1.isVector() || VT2.isVector() || !VT1.isInteger() || !VT2.isInteger()) in isZExtFree() 13662 unsigned NumBits1 = VT1.getSizeInBits(); in isZExtFree() 13668 EVT VT1 = Val.getValueType(); in isZExtFree() local 13669 if (isZExtFree(VT1, VT2)) { in isZExtFree() 13677 return (VT1.isSimple() && !VT1.isVector() && VT1.isInteger() && in isZExtFree() [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.h | 175 bool isNarrowingProfitable(EVT VT1, EVT VT2) const override;
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/openbsd/gnu/llvm/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 180 EVT VT1 = Val.getValueType(); in isZExtFree() local 181 if (!VT1.isSimple() || !VT1.isInteger() || in isZExtFree() 185 switch (VT1.getSimpleVT().SimpleTy) { in isZExtFree()
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/openbsd/gnu/llvm/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 76 for (MVT VT1 : MVT::fixedlen_vector_valuetypes()) { in MipsSETargetLowering() local 77 setTruncStoreAction(VT0, VT1, Expand); in MipsSETargetLowering() 78 setLoadExtAction(ISD::SEXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering() 79 setLoadExtAction(ISD::ZEXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering() 80 setLoadExtAction(ISD::EXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
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/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.h | 149 bool isTruncateFree(EVT VT1, EVT VT2) const override;
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H A D | HexagonISelLowering.cpp | 2137 bool HexagonTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree() argument 2138 if (!VT1.isSimple() || !VT2.isSimple()) in isTruncateFree() 2140 return VT1.getSimpleVT() == MVT::i64 && VT2.getSimpleVT() == MVT::i32; in isTruncateFree()
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/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.h | 1031 bool isTruncateFree(EVT VT1, EVT VT2) const override;
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H A D | PPCISelLowering.cpp | 16834 bool PPCTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree() argument 16835 if (!VT1.isInteger() || !VT2.isInteger()) in isTruncateFree() 16837 unsigned NumBits1 = VT1.getSizeInBits(); in isTruncateFree()
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/openbsd/gnu/llvm/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 18993 EVT VT1 = Val.getValueType(); in isZExtFree() local 18994 if (!VT1.isSimple() || !VT1.isInteger() || in isZExtFree() 18998 switch (VT1.getSimpleVT().SimpleTy) { in isZExtFree()
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