1 /* $OpenBSD: zxreg.h,v 1.2 2008/06/26 05:42:18 ray Exp $ */ 2 /* $NetBSD: zxreg.h,v 1.1 2002/09/13 14:03:53 ad Exp $ */ 3 4 /* 5 * Copyright (c) 2002 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Andrew Doran. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (C) 1999, 2000 Jakub Jelinek (jakub@redhat.com) 35 * 36 * Permission is hereby granted, free of charge, to any person obtaining a copy 37 * of this software and associated documentation files (the "Software"), to deal 38 * in the Software without restriction, including without limitation the rights 39 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 40 * copies of the Software, and to permit persons to whom the Software is 41 * furnished to do so, subject to the following conditions: 42 * 43 * The above copyright notice and this permission notice shall be included in 44 * all copies or substantial portions of the Software. 45 * 46 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 47 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 48 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 49 * JAKUB JELINEK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 50 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 51 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 52 * 53 */ 54 55 #ifndef _DEV_SBUS_ZXREG_H_ 56 #define _DEV_SBUS_ZXREG_H_ 57 58 /* Hardware offsets. */ 59 #define ZX_OFF_UNK2 0x00000000 60 #define ZX_OFF_LC_SS0_KRN 0x00200000 61 #define ZX_OFF_LC_SS0_USR 0x00201000 62 #define ZX_OFF_LD_SS0 0x00400000 63 #define ZX_OFF_LD_GBL 0x00401000 64 #define ZX_OFF_LX_CROSS 0x00600000 65 #define ZX_OFF_LX_CURSOR 0x00601000 66 #define ZX_OFF_UNK 0x00602000 67 #define ZX_OFF_SS0 0x00800000 68 #define ZX_OFF_LC_SS1_KRN 0x01200000 69 #define ZX_OFF_LC_SS1_USR 0x01201000 70 #define ZX_OFF_LD_SS1 0x01400000 71 #define ZX_OFF_SS1 0x01800000 72 73 /* ROP register */ 74 #define ZX_ATTR_PICK_DISABLE 0x00000000 75 #define ZX_ATTR_PICK_2D 0x80000000 76 #define ZX_ATTR_PICK_3D 0xa0000000 77 #define ZX_ATTR_PICK_2D_REND 0xc0000000 78 #define ZX_ATTR_PICK_3D_REND 0xe0000000 79 80 #define ZX_ATTR_DCE_DISABLE 0x00000000 81 #define ZX_ATTR_DCE_ENABLE 0x10000000 82 83 #define ZX_ATTR_APE_DISABLE 0x00000000 84 #define ZX_ATTR_APE_ENABLE 0x08000000 85 86 #define ZX_ATTR_COLOR_VAR 0x00000000 87 #define ZX_ATTR_COLOR_CONST 0x04000000 88 89 #define ZX_ATTR_AA_DISABLE 0x02000000 90 #define ZX_ATTR_AA_ENABLE 0x01000000 91 92 #define ZX_ATTR_ABE_BG 0x00000000 /* dst + alpha * (src - bg) */ 93 #define ZX_ATTR_ABE_FB 0x00800000 /* dst + alpha * (src - dst) */ 94 95 #define ZX_ATTR_ABE_DISABLE 0x00000000 96 #define ZX_ATTR_ABE_ENABLE 0x00400000 97 98 #define ZX_ATTR_BLTSRC_A 0x00000000 99 #define ZX_ATTR_BLTSRC_B 0x00200000 100 101 #define ZX_ROP_ZERO (0x0 << 18) 102 #define ZX_ROP_NEW_AND_OLD (0x8 << 18) 103 #define ZX_ROP_NEW_AND_NOLD (0x4 << 18) 104 #define ZX_ROP_NEW (0xc << 18) 105 #define ZX_ROP_NNEW_AND_OLD (0x2 << 18) 106 #define ZX_ROP_OLD (0xa << 18) 107 #define ZX_ROP_NEW_XOR_OLD (0x6 << 18) 108 #define ZX_ROP_NEW_OR_OLD (0xe << 18) 109 #define ZX_ROP_NNEW_AND_NOLD (0x1 << 18) 110 #define ZX_ROP_NNEW_XOR_NOLD (0x9 << 18) 111 #define ZX_ROP_NOLD (0x5 << 18) 112 #define ZX_ROP_NEW_OR_NOLD (0xd << 18) 113 #define ZX_ROP_NNEW (0x3 << 18) 114 #define ZX_ROP_NNEW_OR_OLD (0xb << 18) 115 #define ZX_ROP_NNEW_OR_NOLD (0x7 << 18) 116 #define ZX_ROP_ONES (0xf << 18) 117 118 #define ZX_ATTR_HSR_DISABLE 0x00000000 119 #define ZX_ATTR_HSR_ENABLE 0x00020000 120 121 #define ZX_ATTR_WRITEZ_DISABLE 0x00000000 122 #define ZX_ATTR_WRITEZ_ENABLE 0x00010000 123 124 #define ZX_ATTR_Z_VAR 0x00000000 125 #define ZX_ATTR_Z_CONST 0x00008000 126 127 #define ZX_ATTR_WCLIP_DISABLE 0x00000000 128 #define ZX_ATTR_WCLIP_ENABLE 0x00004000 129 130 #define ZX_ATTR_MONO 0x00000000 131 #define ZX_ATTR_STEREO_LEFT 0x00001000 132 #define ZX_ATTR_STEREO_RIGHT 0x00003000 133 134 #define ZX_ATTR_WE_DISABLE 0x00000000 135 #define ZX_ATTR_WE_ENABLE 0x00000800 136 137 #define ZX_ATTR_FCE_DISABLE 0x00000000 138 #define ZX_ATTR_FCE_ENABLE 0x00000400 139 140 #define ZX_ATTR_RE_DISABLE 0x00000000 141 #define ZX_ATTR_RE_ENABLE 0x00000200 142 143 #define ZX_ATTR_GE_DISABLE 0x00000000 144 #define ZX_ATTR_GE_ENABLE 0x00000100 145 146 #define ZX_ATTR_BE_DISABLE 0x00000000 147 #define ZX_ATTR_BE_ENABLE 0x00000080 148 149 #define ZX_ATTR_RGBE_DISABLE 0x00000000 150 #define ZX_ATTR_RGBE_ENABLE 0x00000380 151 152 #define ZX_ATTR_OE_DISABLE 0x00000000 153 #define ZX_ATTR_OE_ENABLE 0x00000040 154 155 #define ZX_ATTR_ZE_DISABLE 0x00000000 156 #define ZX_ATTR_ZE_ENABLE 0x00000020 157 158 #define ZX_ATTR_FORCE_WID 0x00000010 159 160 #define ZX_ATTR_FC_PLANE_MASK 0x0000000e 161 162 #define ZX_ATTR_BUFFER_A 0x00000000 163 #define ZX_ATTR_BUFFER_B 0x00000001 164 165 /* CSR */ 166 #define ZX_CSR_BLT_BUSY 0x20000000 167 168 struct zx_draw { 169 u_int32_t zd_pad0[896]; 170 u_int32_t zd_csr; 171 u_int32_t zd_wid; 172 u_int32_t zd_wmask; 173 u_int32_t zd_widclip; 174 u_int32_t zd_vclipmin; 175 u_int32_t zd_vclipmax; 176 u_int32_t zd_pickmin; /* SS1 only */ 177 u_int32_t zd_pickmax; /* SS1 only */ 178 u_int32_t zd_fg; 179 u_int32_t zd_bg; 180 u_int32_t zd_src; /* Copy/Scroll (SS0 only) */ 181 u_int32_t zd_dst; /* Copy/Scroll/Fill (SS0 only) */ 182 u_int32_t zd_extent; /* Copy/Scroll/Fill size (SS0 only) */ 183 u_int32_t zd_pad1[3]; 184 u_int32_t zd_setsem; /* SS1 only */ 185 u_int32_t zd_clrsem; /* SS1 only */ 186 u_int32_t zd_clrpick; /* SS1 only */ 187 u_int32_t zd_clrdat; /* SS1 only */ 188 u_int32_t zd_alpha; /* SS1 only */ 189 u_int32_t zd_pad2[11]; 190 u_int32_t zd_winbg; 191 u_int32_t zd_planemask; 192 u_int32_t zd_rop; 193 u_int32_t zd_z; 194 u_int32_t zd_dczf; /* SS1 only */ 195 u_int32_t zd_dczb; /* SS1 only */ 196 u_int32_t zd_dcs; /* SS1 only */ 197 u_int32_t zd_dczs; /* SS1 only */ 198 u_int32_t zd_pickfb; /* SS1 only */ 199 u_int32_t zd_pickbb; /* SS1 only */ 200 u_int32_t zd_dcfc; /* SS1 only */ 201 u_int32_t zd_forcecol; /* SS1 only */ 202 u_int32_t zd_door[8]; /* SS1 only */ 203 u_int32_t zd_pick[5]; /* SS1 only */ 204 }; 205 206 /* EXTENT */ 207 #define ZX_EXTENT_DIR_FORWARDS 0x00000000 208 #define ZX_EXTENT_DIR_BACKWARDS 0x80000000 209 210 struct zx_draw_ss1 { 211 u_int32_t zd_pad0[957]; 212 u_int32_t zd_misc; 213 }; 214 #define ZX_SS1_MISC_ENABLE 0x00000001 215 #define ZX_SS1_MISC_STEREO 0x00000002 216 217 #define ZX_ADDRSPC_OBGR 0x00 218 #define ZX_ADDRSPC_Z 0x01 219 #define ZX_ADDRSPC_W 0x02 220 #define ZX_ADDRSPC_FONT_OBGR 0x04 221 #define ZX_ADDRSPC_FONT_Z 0x05 222 #define ZX_ADDRSPC_FONT_W 0x06 223 #define ZX_ADDRSPC_O 0x08 224 #define ZX_ADDRSPC_B 0x09 225 #define ZX_ADDRSPC_G 0x0a 226 #define ZX_ADDRSPC_R 0x0b 227 228 struct zx_command { 229 u_int32_t zc_csr; 230 u_int32_t zc_addrspace; 231 u_int32_t zc_fontmsk; 232 u_int32_t zc_fontt; 233 u_int32_t zc_extent; 234 u_int32_t zc_src; 235 u_int32_t zc_dst; 236 u_int32_t zc_copy; 237 u_int32_t zc_fill; 238 }; 239 240 #define ZX_CROSS_TYPE_CLUT0 0x00001000 241 #define ZX_CROSS_TYPE_CLUT1 0x00001001 242 #define ZX_CROSS_TYPE_CLUT2 0x00001002 243 #define ZX_CROSS_TYPE_WID 0x00001003 244 #define ZX_CROSS_TYPE_UNK 0x00001006 245 #define ZX_CROSS_TYPE_VIDEO 0x00002003 246 #define ZX_CROSS_TYPE_CLUTDATA 0x00004000 247 248 #define ZX_CROSS_CSR_ENABLE 0x00000008 249 #define ZX_CROSS_CSR_PROGRESS 0x00000004 250 #define ZX_CROSS_CSR_UNK 0x00000002 251 #define ZX_CROSS_CSR_UNK2 0x00000001 252 253 struct zx_cross { 254 u_int32_t zx_type; 255 u_int32_t zx_csr; 256 u_int32_t zx_value; 257 }; 258 259 struct zx_cursor { 260 u_int32_t zcu_pad0[4]; 261 u_int32_t zcu_type; 262 u_int32_t zcu_misc; 263 u_int32_t zcu_sxy; 264 u_int32_t zcu_data; 265 }; 266 267 #endif /* !_DEV_SBUS_ZXREG_H_ */ 268