/openbsd/gnu/llvm/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyInstrAtomics.td | 148 // i64 (and (i64 (anyext (i32 (atomic_load_8)))), 255) 162 // match bare subword loads (for 32-bit results) and anyext loads (for 64-bit 166 PatFrag<(ops node:$addr), (anyext (i32 (atomic_load_8 node:$addr)))>; 168 PatFrag<(ops node:$addr), (anyext (i32 (atomic_load_16 node:$addr)))>; 380 // load patterns above. We match subword RMWs (for 32-bit) and anyext RMWs (for 388 (anyext (i32 (kind node:$addr, (i32 (trunc (i64 node:$val))))))>; 492 // additional nodes such as anyext or assertzext depending on operand types. 510 // We match subword RMWs (for 32-bit) and anyext RMWs (for 64-bit) and select a 519 (anyext (i32 (assertzext (i32
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H A D | WebAssemblyInstrConv.td | 54 def : Pat<(i64 (anyext I32:$src)), (I64_EXTEND_U_I32 I32:$src)>;
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/openbsd/gnu/llvm/llvm/include/llvm/Support/ |
H A D | KnownBits.h | 158 KnownBits anyext(unsigned BitWidth) const { in anyext() function 179 return anyext(BitWidth); in anyextOrTrunc()
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H A D | TargetOpcodes.def | 53 /// anyext operations on target architectures which support it. 349 /// Generic load (including anyext load) 358 /// Generic indexed load (including anyext load)
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/openbsd/gnu/llvm/llvm/lib/Target/M68k/ |
H A D | M68kInstrData.td | 588 // i16 <- anyext i8 589 def: Pat<(i16 (anyext i8:$src)), 598 // i32 <- anyext i8 599 def: Pat<(i32 (anyext i8:$src)), (MOVZXd32d8 MxDRD8:$src)>; 604 // i32 <- anyext i16 605 def: Pat<(i32 (anyext i16:$src)), (MOVZXd32d16 MxDRD16:$src)>;
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H A D | M68kInstrControl.td | 327 def : Pat<(i16 (anyext (i8 (MxSetCC_C MxCONDcs, CCR)))), (SETCS_C16d)>; 328 def : Pat<(i32 (anyext (i8 (MxSetCC_C MxCONDcs, CCR)))), (SETCS_C32d)>;
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/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/ |
H A D | HexagonPatterns.td | 3032 /*anyext*/ L4_add_memopb_io>; 3038 /*anyext*/ L4_add_memoph_io>; 3047 /*anyext*/ L4_sub_memopb_io>; 3053 /*anyext*/ L4_sub_memoph_io>; 3062 /*anyext*/ L4_and_memopb_io>; 3068 /*anyext*/ L4_and_memoph_io>; 3077 /*anyext*/ L4_or_memopb_io>; 3083 /*anyext*/ L4_or_memoph_io>; 3133 /*anyext*/ IdImm, L4_iadd_memopb_io>; 3139 /*anyext*/ IdImm, L4_iadd_memoph_io>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/X86/ |
H A D | X86InstrCompiler.td | 1456 // anyext. Define these to do an explicit zero-extend to 1458 def : Pat<(i16 (anyext GR8 :$src)), (EXTRACT_SUBREG 1460 def : Pat<(i32 (anyext GR8 :$src)), (MOVZX32rr8 GR8 :$src)>; 1463 def : Pat<(i32 (anyext GR16:$src)), 1466 def : Pat<(i64 (anyext GR8 :$src)), 1468 def : Pat<(i64 (anyext GR16:$src)), 1470 def : Pat<(i64 (anyext GR32:$src)), 1477 def anyext_sdiv : PatFrag<(ops node:$lhs), (anyext node:$lhs),[{ 1503 def : Pat<(i64 (and (anyext def32:$src), 0x00000000FFFFFFFF)), 1800 def : Pat<(i32 (anyext (srl_su GR16:$src, (i8 8)))), [all …]
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H A D | X86InstrMMX.td | 537 (i32 (anyext (loadi16 addr:$src2))),
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/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrVSX.td | 4835 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 0)))), 4837 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 1)))), 4839 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 2)))), 4841 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 3)))), 4843 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 4)))), 4845 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 5)))), 4847 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 6)))), 4849 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 7)))), 4971 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 0)))), 4973 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 1)))), [all …]
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H A D | PPCInstrInfo.td | 3354 def : Pat<(i32 (anyext i1:$in)), 3356 def : Pat<(i64 (anyext i1:$in)), 3463 def : Pat<(i32 (anyext pattern)), 3466 def : Pat<(i64 (anyext pattern)), 3487 def : Pat<(i32 (anyext (i1 (pfrag i32:$s1, cc)))), 3489 def : Pat<(i64 (anyext (i1 (pfrag i64:$s1, cc)))), 3491 def : Pat<(i64 (anyext (i1 (pfrag i32:$s1, cc)))), 3493 def : Pat<(i32 (anyext (i1 (pfrag i64:$s1, cc)))), 3593 def : Pat<(i32 (anyext (i1 (pfrag i32:$s1, i32:$sa, cc)))), 3595 def : Pat<(i64 (anyext (i1 (pfrag i64:$s1, i32:$sa, cc)))), [all …]
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H A D | PPCInstrP10.td | 1883 def : Pat<(i32 (anyext pattern)), 1885 def : Pat<(i64 (anyext pattern)), 1943 def : Pat<(i32 (anyext i1:$in)), 1945 def : Pat<(i64 (anyext i1:$in)),
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/openbsd/gnu/llvm/llvm/lib/Target/VE/ |
H A D | VEInstrInfo.td | 1717 def : Pat<(i64 (anyext i32:$sy)), (i2l $sy)>; 1806 def : Pat<(i64 (sext_inreg (i64 (anyext (from ADDRrri:$addr))), TY)), 1808 def : Pat<(i64 (sext_inreg (i64 (anyext (from ADDRrii:$addr))), TY)), 1810 def : Pat<(i64 (sext_inreg (i64 (anyext (from ADDRzri:$addr))), TY)), 1812 def : Pat<(i64 (sext_inreg (i64 (anyext (from ADDRzii:$addr))), TY)), 1836 def : Pat<(i64 (and (anyext (from ADDRrri:$addr)), VAL)), 1838 def : Pat<(i64 (and (anyext (from ADDRrii:$addr)), VAL)), 1840 def : Pat<(i64 (and (anyext (from ADDRzri:$addr)), VAL)), 1842 def : Pat<(i64 (and (anyext (from ADDRzii:$addr)), VAL)),
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/openbsd/gnu/llvm/llvm/include/llvm/Target/GlobalISel/ |
H A D | SelectionDAGCompat.td | 45 def : GINodeEquiv<G_ANYEXT, anyext>;
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/openbsd/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
H A D | FunctionLoweringInfo.cpp | 417 LOI->Known = LOI->Known.anyext(BitWidth); in GetLiveOutRegInfo()
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/openbsd/gnu/llvm/llvm/lib/Target/Sparc/ |
H A D | SparcInstr64Bit.td | 20 // This give us free trunc and anyext. 21 def : Pat<(i64 (anyext i32:$val)), (COPY_TO_REGCLASS $val, I64Regs)>;
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/openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfoVSDPatterns.td | 647 defm : VPatExtendSDNode_V<[zext, anyext], "PseudoVZEXT", "VF2", 651 defm : VPatExtendSDNode_V<[zext, anyext], "PseudoVZEXT", "VF4", 655 defm : VPatExtendSDNode_V<[zext, anyext], "PseudoVZEXT", "VF8",
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/openbsd/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
H A D | GISelKnownBits.cpp | 399 Known = Known.anyext(BitWidth); in computeKnownBitsImpl()
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/openbsd/gnu/llvm/llvm/lib/Target/NVPTX/ |
H A D | NVPTXInstrInfo.td | 2948 // anyext i1 2949 def : Pat<(i16 (anyext Int1Regs:$a)), 2951 def : Pat<(i32 (anyext Int1Regs:$a)), 2953 def : Pat<(i64 (anyext Int1Regs:$a)), 2968 // anyext i16 2969 def : Pat<(i32 (anyext Int16Regs:$a)), 2971 def : Pat<(i64 (anyext Int16Regs:$a)), 2982 // anyext i32 2983 def : Pat<(i64 (anyext Int32Regs:$a)),
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/openbsd/gnu/llvm/llvm/lib/Target/SystemZ/ |
H A D | SystemZOperators.td | 502 def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>; 503 def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>;
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/openbsd/gnu/llvm/llvm/lib/Target/BPF/ |
H A D | BPFInstrInfo.td | 915 // For i32 -> i64 anyext, we don't care about the high bits. 916 def : Pat<(i64 (anyext GPR32:$src)),
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | VOP1Instructions.td | 1212 (i32 (anyext i16:$src)), 1217 (i64 (anyext i16:$src)),
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/openbsd/gnu/llvm/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrInfo.td | 959 // anyext 960 def : Pat<(i16 (anyext GR8:$src)),
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/openbsd/gnu/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.td | 3196 // anyext -> zext 4669 defm : SIMDVectorLShiftLongBySizeBHSPats<anyext>; 5844 def : Pat<(sext_inreg (i64 (anyext (i32 (vector_extract (v16i8 V128:$Rn), 5847 def : Pat<(sext_inreg (i64 (anyext (i32 (vector_extract (v8i16 V128:$Rn), 5862 def : Pat<(i64 (and (i64 (anyext (i32 (vector_extract (v16i8 V128:$Rn), 5865 def : Pat<(i64 (and (i64 (anyext (i32 (vector_extract (v8i16 V128:$Rn), 6967 def : Pat<(v8i16 (anyext (v8i8 (extract_subvector V128:$Rn, (i64 8)) ))), 6973 def : Pat<(v4i32 (anyext (v4i16 (extract_subvector V128:$Rn, (i64 4)) ))), 6979 def : Pat<(v2i64 (anyext (v2i32 (extract_subvector V128:$Rn, (i64 2)) ))), 7276 // (v4i32 (insert_vector_elt (load anyext from i8) idx)) [all …]
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/openbsd/gnu/llvm/llvm/include/llvm/Target/ |
H A D | TargetSelectionDAG.td | 149 def SDTIntExtendOp : SDTypeProfile<1, 1, [ // sext, zext, anyext 458 def anyext : SDNode<"ISD::ANY_EXTEND" , SDTIntExtendOp>; 984 (anyext node:$op)]>;
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