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Searched refs:cfgBIF_CFG_DEV0_EPF0_LANE_5_MARGINING_LANE_STATUS (Results 1 – 3 of 3) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_9_0_offset.h1055 #define cfgBIF_CFG_DEV0_EPF0_LANE_5_MARGINING_LANE_STATUS … macro
H A Dnbio_7_7_0_offset.h667 #define cfgBIF_CFG_DEV0_EPF0_LANE_5_MARGINING_LANE_STATUS … macro
H A Dnbio_7_2_0_offset.h641 #define cfgBIF_CFG_DEV0_EPF0_LANE_5_MARGINING_LANE_STATUS … macro