Searched refs:clock_req (Results 1 – 13 of 13) sorted by relevance
602 struct pp_display_clock_request clock_req; in pp_nv_set_hard_min_dcefclk_by_freq() local605 clock_req.clock_type = amd_pp_dcef_clock; in pp_nv_set_hard_min_dcefclk_by_freq()606 clock_req.clock_freq_in_khz = mhz * 1000; in pp_nv_set_hard_min_dcefclk_by_freq()625 struct pp_display_clock_request clock_req; in pp_nv_set_hard_min_uclk_by_freq() local628 clock_req.clock_type = amd_pp_mem_clock; in pp_nv_set_hard_min_uclk_by_freq()629 clock_req.clock_freq_in_khz = mhz * 1000; in pp_nv_set_hard_min_uclk_by_freq()661 struct pp_display_clock_request clock_req; in pp_nv_set_voltage_by_freq() local666 clock_req.clock_type = amd_pp_disp_clock; in pp_nv_set_voltage_by_freq()669 clock_req.clock_type = amd_pp_phy_clock; in pp_nv_set_voltage_by_freq()672 clock_req.clock_type = amd_pp_pixel_clock; in pp_nv_set_voltage_by_freq()[all …]
52 struct pp_display_clock_request *clock_req) in smu10_display_clock_voltage_request() argument55 enum amd_pp_clock_type clk_type = clock_req->clock_type; in smu10_display_clock_voltage_request()56 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in smu10_display_clock_voltage_request()192 struct pp_display_clock_request clock_req; in smu10_set_clock_limit() local195 clock_req.clock_type = amd_pp_dcf_clock; in smu10_set_clock_limit()196 clock_req.clock_freq_in_khz = clocks.dcefClock * 10; in smu10_set_clock_limit()198 PP_ASSERT_WITH_CODE(!smu10_display_clock_voltage_request(hwmgr, &clock_req), in smu10_set_clock_limit()
1564 struct pp_display_clock_request *clock_req) in vega12_display_clock_voltage_request() argument1568 enum amd_pp_clock_type clk_type = clock_req->clock_type; in vega12_display_clock_voltage_request()1569 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in vega12_display_clock_voltage_request()1611 struct pp_display_clock_request clock_req; in vega12_notify_smc_display_config_after_ps_adjustment() local1625 clock_req.clock_type = amd_pp_dcef_clock; in vega12_notify_smc_display_config_after_ps_adjustment()1626 clock_req.clock_freq_in_khz = min_clocks.dcefClock / 10; in vega12_notify_smc_display_config_after_ps_adjustment()1627 if (!vega12_display_clock_voltage_request(hwmgr, &clock_req)) { in vega12_notify_smc_display_config_after_ps_adjustment()
2288 struct pp_display_clock_request *clock_req) in vega20_display_clock_voltage_request() argument2292 enum amd_pp_clock_type clk_type = clock_req->clock_type; in vega20_display_clock_voltage_request()2293 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in vega20_display_clock_voltage_request()2344 struct pp_display_clock_request clock_req; in vega20_notify_smc_display_config_after_ps_adjustment() local2352 clock_req.clock_type = amd_pp_dcef_clock; in vega20_notify_smc_display_config_after_ps_adjustment()2353 clock_req.clock_freq_in_khz = min_clocks.dcefClock * 10; in vega20_notify_smc_display_config_after_ps_adjustment()2354 if (!vega20_display_clock_voltage_request(hwmgr, &clock_req)) { in vega20_notify_smc_display_config_after_ps_adjustment()
4001 struct pp_display_clock_request *clock_req) in vega10_display_clock_voltage_request() argument4004 enum amd_pp_clock_type clk_type = clock_req->clock_type; in vega10_display_clock_voltage_request()4005 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in vega10_display_clock_voltage_request()4071 struct pp_display_clock_request clock_req; in vega10_notify_smc_display_config_after_ps_adjustment() local4090 clock_req.clock_type = amd_pp_dcef_clock; in vega10_notify_smc_display_config_after_ps_adjustment()4091 clock_req.clock_freq_in_khz = dpm_table->dpm_levels[i].value * 10; in vega10_notify_smc_display_config_after_ps_adjustment()4092 if (!vega10_display_clock_voltage_request(hwmgr, &clock_req)) { in vega10_notify_smc_display_config_after_ps_adjustment()
207 *clock_req);
186 *clock_req);
1073 *clock_req);
1054 *clock_req) in smu_v11_0_display_clock_voltage_request()1056 enum amd_pp_clock_type clk_type = clock_req->clock_type; in smu_v11_0_display_clock_voltage_request()1059 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in smu_v11_0_display_clock_voltage_request()
2081 struct pp_display_clock_request clock_req; in navi10_notify_smc_display_config() local2089 clock_req.clock_type = amd_pp_dcef_clock; in navi10_notify_smc_display_config()2090 clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10; in navi10_notify_smc_display_config()2092 ret = smu_v11_0_display_clock_voltage_request(smu, &clock_req); in navi10_notify_smc_display_config()
1781 struct pp_display_clock_request clock_req; in sienna_cichlid_notify_smc_display_config() local1789 clock_req.clock_type = amd_pp_dcef_clock; in sienna_cichlid_notify_smc_display_config()1790 clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10; in sienna_cichlid_notify_smc_display_config()1792 ret = smu_v11_0_display_clock_voltage_request(smu, &clock_req); in sienna_cichlid_notify_smc_display_config()
1080 *clock_req) in smu_v13_0_display_clock_voltage_request()1082 enum amd_pp_clock_type clk_type = clock_req->clock_type; in smu_v13_0_display_clock_voltage_request()1085 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in smu_v13_0_display_clock_voltage_request()
2819 struct pp_display_clock_request *clock_req) in smu_display_clock_voltage_request() argument2828 ret = smu->ppt_funcs->display_clock_voltage_request(smu, clock_req); in smu_display_clock_voltage_request()