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Searched refs:cmpxchg (Results 1 – 25 of 44) sorted by relevance

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/openbsd/sys/dev/pci/drm/
H A Ddrm_lock.c75 prev = cmpxchg(lock, old, new); in drm_lock_take()
118 prev = cmpxchg(lock, old, new); in drm_lock_transfer()
141 prev = cmpxchg(lock, old, new); in drm_legacy_lock_free()
319 prev = cmpxchg(lock, old, DRM_KERNEL_CONTEXT); in drm_legacy_idlelock_release()
/openbsd/gnu/llvm/llvm/docs/
H A DAtomics.rst109 ``cmpxchg`` and ``atomicrmw`` are essentially like an atomic load followed by an
110 atomic store (where the store is conditional for ``cmpxchg``), but no other
245 stores. No fences are required. ``cmpxchg`` and ``atomicrmw`` are required
427 ``cmpxchg`` using a library call to a function that uses a mutex, ``atomic
447 operation. Loads and stores generate normal instructions. ``cmpxchg`` and
455 * cmpxchg -> loop with load-linked/store-conditional
458 * large loads/stores -> ll-sc/cmpxchg
463 * atomic rmw -> loop with cmpxchg or load-linked/store-conditional
466 * part-word atomicrmw/cmpxchg -> target-specific intrinsic by overriding
473 AtomicExpandPass supports two strategies for lowering atomicrmw/cmpxchg to
[all …]
/openbsd/gnu/gcc/gcc/config/i386/
H A Dsync.md85 "lock\;cmpxchg{<modesuffix>}\t{%3, %1|%1, %3}")
99 "lock\;cmpxchg<doublemodesuffix>b\t%1")
180 "lock\;cmpxchg{<modesuffix>}\t{%3, %1|%1, %3}")
199 "lock\;cmpxchg<doublemodesuffix>b\t%1")
/openbsd/gnu/llvm/llvm/include/llvm/IR/
H A DIntrinsicsLoongArch.td33 // TODO: Support cmpxchg on LA32.
47 // @llvm.loongarch.masked.cmpxchg.i64.<p>(
/openbsd/sys/dev/pci/drm/i915/
H A Di915_sw_fence.h120 cmpxchg(&fence->error, 0, error); in i915_sw_fence_set_error_once()
H A Di915_active.c219 return cmpxchg(__active_fence_slot(active), fence, NULL) == fence; in active_fence_cb()
1105 while (cmpxchg(__active_fence_slot(active), prev, fence) != prev) { in __i915_active_fence_set()
H A Di915_gpu_error.c983 if (cmpxchg(&error->sgl, NULL, m.sgl)) in err_print_to_sgl()
2231 cmpxchg(&i915->gpu_error.first_error, NULL, error)) in i915_error_state_store()
2266 cmpxchg(&gt->i915->gpu_error.first_error, NULL, error); in i915_capture_error_state()
/openbsd/sys/dev/pci/drm/scheduler/
H A Dsched_entity.c297 last_user = cmpxchg(&entity->last_user, current->group_leader, NULL);
301 last_user = cmpxchg(&entity->last_user, curpr, NULL);
/openbsd/gnu/gcc/libgomp/
H A Dconfigure.tgt49 # Note that bare i386 is not included here. We need cmpxchg.
/openbsd/sys/dev/pci/drm/i915/gt/
H A Dintel_gt_requests.c100 if (cmpxchg(&tl->retire, NULL, RSTUB)) /* already queued */ in add_retire()
H A Dintel_gt_buffer_pool.c196 if (cmpxchg(&node->age, age, 0) == age) { in intel_gt_get_buffer_pool()
/openbsd/gnu/llvm/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_atomic_msvc.h184 lock cmpxchg [ecx], dl in atomic_compare_exchange_strong()
/openbsd/gnu/gcc/gcc/config/ia64/
H A Dsync.md148 "cmpxchg<modesuffix>.rel %0 = %1, %3, %2"
/openbsd/gnu/usr.bin/binutils/opcodes/
H A Dia64-ic.tbl6 cmpxchg; cmpxchg1, cmpxchg2, cmpxchg4, cmpxchg8, cmp8xchg16
62 mem-readers-int; IC:cmpxchg, IC:fetchadd, IC:xchg, IC:ld
66 mem-writers-int; IC:cmpxchg, IC:fetchadd, IC:xchg, IC:st
220 …ndcm, break.f, break.i, break.m, break.x, chk.s, IC:chk-a, cmp, cmp4, IC:cmpxchg, IC:czx, dep, ext…
/openbsd/gnu/usr.bin/binutils-2.17/opcodes/
H A Dia64-ic.tbl6 cmpxchg; cmpxchg1, cmpxchg2, cmpxchg4, cmpxchg8, cmp8xchg16
62 mem-readers-int; IC:cmpxchg, IC:fetchadd, IC:xchg, IC:ld
66 mem-writers-int; IC:cmpxchg, IC:fetchadd, IC:xchg, IC:st
223 …ndcm, break.f, break.i, break.m, break.x, chk.s, IC:chk-a, cmp, cmp4, IC:cmpxchg, clz, IC:czx, dep…
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64InstrAtomics.td481 // Atomic cmpxchg for -O0
486 // STXR it can clear the exclusive monitor, causing all cmpxchg attempts to
492 // assume seq_cst, strong cmpxchg and omit clrex on failure.
/openbsd/gnu/llvm/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrAtomics.td439 // TODO LLVM IR's cmpxchg instruction returns a pair of {loaded value, success
464 WebAssemblyTerRMW<I32, "i32.atomic.rmw.cmpxchg", 0x48>;
466 WebAssemblyTerRMW<I64, "i64.atomic.rmw.cmpxchg", 0x49>;
/openbsd/gnu/llvm/llvm/utils/vim/syntax/
H A Dllvm.vim27 syn keyword llvmStatement cleanuppad cleanupret cmpxchg eq exact extractelement
/openbsd/sys/dev/pci/drm/include/linux/
H A Datomic.h60 #define cmpxchg(p, o, n) __sync_val_compare_and_swap(p, o, n) macro
/openbsd/gnu/llvm/llvm/docs/GlobalISel/
H A DGenericOpcode.rst724 Generic atomic cmpxchg with internal success check. Expects a
730 Generic atomic cmpxchg. Expects a MachineMemOperand in addition to explicit
/openbsd/gnu/llvm/llvm/include/llvm/Support/
H A DTargetOpcodes.def373 /// Generic atomic cmpxchg with internal success check.
376 /// Generic atomic cmpxchg.
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_ctx.c257 if (cmpxchg(&ctx->entities[hw_ip][ring], NULL, entity)) in amdgpu_ctx_init_entity()
/openbsd/gnu/llvm/llvm/lib/AsmParser/
H A DLLLexer.cpp871 INSTKEYWORD(cmpxchg, AtomicCmpXchg); in LexIdentifier()
/openbsd/gnu/gcc/gcc/
H A Dgimplify.c5194 tree type, itype, cmpxchg, args, x, iaddr; in gimplify_omp_atomic_pipeline() local
5196 cmpxchg = built_in_decls[BUILT_IN_VAL_COMPARE_AND_SWAP_N + index + 1]; in gimplify_omp_atomic_pipeline()
5198 itype = TREE_TYPE (TREE_TYPE (cmpxchg)); in gimplify_omp_atomic_pipeline()
5258 x = build_function_call_expr (cmpxchg, args); in gimplify_omp_atomic_pipeline()
/openbsd/gnu/llvm/llvm/lib/Target/X86/
H A DX86InstrInfo.td2207 "cmpxchg{b}\t{$src, $dst|$dst, $src}", []>, TB,
2211 "cmpxchg{w}\t{$src, $dst|$dst, $src}", []>, TB, OpSize16,
2215 "cmpxchg{l}\t{$src, $dst|$dst, $src}", []>, TB, OpSize32,
2219 "cmpxchg{q}\t{$src, $dst|$dst, $src}", []>, TB,
2227 "cmpxchg{b}\t{$src, $dst|$dst, $src}", []>, TB,
2231 "cmpxchg{w}\t{$src, $dst|$dst, $src}", []>, TB, OpSize16,
2235 "cmpxchg{l}\t{$src, $dst|$dst, $src}", []>, TB, OpSize32,
2239 "cmpxchg{q}\t{$src, $dst|$dst, $src}", []>, TB,

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