| /openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn201/ |
| H A D | irq_service_dcn201.c | 252 dummy_irq_entry(),
253 dummy_irq_entry(),
254 dummy_irq_entry(),
255 dummy_irq_entry(),
258 dummy_irq_entry(),
259 dummy_irq_entry(),
260 dummy_irq_entry(),
261 dummy_irq_entry(),
264 dummy_irq_entry(),
265 dummy_irq_entry(),
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| /openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn31/ |
| H A D | irq_service_dcn31.c | 295 #define dummy_irq_entry() \ macro
304 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
319 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
342 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
347 [DC_IRQ_SOURCE_PFLIP5] = dummy_irq_entry(),
348 [DC_IRQ_SOURCE_PFLIP6] = dummy_irq_entry(),
349 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
387 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
388 [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
401 [DC_IRQ_SOURCE_DC5_VLINE1] = dummy_irq_entry(),
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| /openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn315/ |
| H A D | irq_service_dcn315.c | 302 #define dummy_irq_entry() \ macro
311 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
326 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
349 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
354 [DC_IRQ_SOURCE_PFLIP5] = dummy_irq_entry(),
355 [DC_IRQ_SOURCE_PFLIP6] = dummy_irq_entry(),
356 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
394 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
395 [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
408 [DC_IRQ_SOURCE_DC5_VLINE1] = dummy_irq_entry(),
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| /openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn32/ |
| H A D | irq_service_dcn32.c | 296 #define dummy_irq_entry() \ macro
305 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
320 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
343 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
348 [DC_IRQ_SOURCE_PFLIP5] = dummy_irq_entry(),
349 [DC_IRQ_SOURCE_PFLIP6] = dummy_irq_entry(),
350 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
388 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
389 [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
402 [DC_IRQ_SOURCE_DC5_VLINE1] = dummy_irq_entry(),
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| /openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn314/ |
| H A D | irq_service_dcn314.c | 297 #define dummy_irq_entry() \ macro
306 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
321 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
344 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
349 [DC_IRQ_SOURCE_PFLIP5] = dummy_irq_entry(),
350 [DC_IRQ_SOURCE_PFLIP6] = dummy_irq_entry(),
351 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
389 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
390 [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
403 [DC_IRQ_SOURCE_DC5_VLINE1] = dummy_irq_entry(),
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| /openbsd/sys/dev/pci/drm/amd/display/dc/irq/dce80/ |
| H A D | irq_service_dce80.c | 169 #define dummy_irq_entry() \ macro
175 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
178 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
181 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
184 [DC_IRQ_SOURCE_DC ## reg_num ## UNDERFLOW] = dummy_irq_entry()
194 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
219 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
226 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
264 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
265 [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
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| /openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn10/ |
| H A D | irq_service_dcn10.c | 266 #define dummy_irq_entry() \ macro
272 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
275 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
278 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
290 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
315 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
320 [DC_IRQ_SOURCE_PFLIP5] = dummy_irq_entry(),
321 [DC_IRQ_SOURCE_PFLIP6] = dummy_irq_entry(),
322 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
360 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
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| /openbsd/sys/dev/pci/drm/amd/display/dc/irq/dce120/ |
| H A D | irq_service_dce120.c | 160 #define dummy_irq_entry() \ macro
166 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
169 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
172 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
175 [DC_IRQ_SOURCE_DC ## reg_num ## UNDERFLOW] = dummy_irq_entry()
184 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
209 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
216 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
254 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
255 [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
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| /openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn21/ |
| H A D | irq_service_dcn21.c | 302 #define dummy_irq_entry() \ macro
308 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
311 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
314 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
326 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
349 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
354 [DC_IRQ_SOURCE_PFLIP5] = dummy_irq_entry(),
355 [DC_IRQ_SOURCE_PFLIP6] = dummy_irq_entry(),
356 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
394 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
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| /openbsd/sys/dev/pci/drm/amd/display/dc/irq/dce60/ |
| H A D | irq_service_dce60.c | 177 #define dummy_irq_entry() \ macro
183 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
186 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
189 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
192 [DC_IRQ_SOURCE_DC ## reg_num ## UNDERFLOW] = dummy_irq_entry()
202 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
227 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
234 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
272 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
273 [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
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| /openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn303/ |
| H A D | irq_service_dcn303.c | 184 #define dummy_irq_entry() { .funcs = &dummy_irq_info_funcs } macro
187 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
190 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
193 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
196 [DC_IRQ_SOURCE_DC ## reg_num ## UNDERFLOW] = dummy_irq_entry()
204 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
213 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
216 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
250 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
251 [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
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| /openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn20/ |
| H A D | irq_service_dcn20.c | 273 #define dummy_irq_entry() \ macro
279 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
282 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
285 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
288 [DC_IRQ_SOURCE_DC ## reg_num ## UNDERFLOW] = dummy_irq_entry()
297 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
322 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
329 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
367 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
368 [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
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| /openbsd/sys/dev/pci/drm/amd/display/dc/irq/dce110/ |
| H A D | irq_service_dce110.c | 165 #define dummy_irq_entry() \ macro
171 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
174 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
177 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
180 [DC_IRQ_SOURCE_DC ## reg_num ## UNDERFLOW] = dummy_irq_entry()
239 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
264 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
271 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
309 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
310 [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
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| /openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn302/ |
| H A D | irq_service_dcn302.c | 279 #define dummy_irq_entry() { .funcs = &dummy_irq_info_funcs } macro
282 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
285 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
288 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
291 [DC_IRQ_SOURCE_DC ## reg_num ## UNDERFLOW] = dummy_irq_entry()
299 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
320 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
326 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
363 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
364 [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
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| /openbsd/sys/dev/pci/drm/amd/display/dc/irq/dcn30/ |
| H A D | irq_service_dcn30.c | 309 #define dummy_irq_entry() \ macro
315 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
318 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
321 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
324 [DC_IRQ_SOURCE_DC ## reg_num ## UNDERFLOW] = dummy_irq_entry()
333 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
358 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
365 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
403 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
404 [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
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