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Searched refs:getAllocatableSet (Results 1 – 10 of 10) sorted by relevance

/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DSIFormMemoryClauses.cpp275 MaxVGPRs = TRI->getAllocatableSet(MF, &AMDGPU::VGPR_32RegClass).count(); in runOnMachineFunction()
276 MaxSGPRs = TRI->getAllocatableSet(MF, &AMDGPU::SGPR_32RegClass).count(); in runOnMachineFunction()
/openbsd/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsDelaySlotFiller.cpp333 assert(MF.getSubtarget().getRegisterInfo()->getAllocatableSet(MF).test(R) && in addLiveInRegs()
389 BitVector AllocSet = TRI.getAllocatableSet(MF); in setUnallocatableRegs()
H A DMips16InstrInfo.cpp351 RI.getAllocatableSet in loadImmediate()
/openbsd/gnu/llvm/llvm/lib/CodeGen/
H A DAggressiveAntiDepBreaker.cpp128 BitVector CPSet = TRI->getAllocatableSet(MF, CriticalPathRCs[i]); in AggressiveAntiDepBreaker()
524 BitVector RCBV = TRI->getAllocatableSet(MF, RC); in GetRenameRegisters()
H A DTargetRegisterInfo.cpp256 BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF, in getAllocatableSet() function in TargetRegisterInfo
H A DRegisterScavenging.cpp531 BitVector Candidates = TRI->getAllocatableSet(MF, RC); in scavengeRegister()
H A DPrologEpilogInserter.cpp1255 const BitVector AllocatableSet(TRI.getAllocatableSet(MF)); in insertZeroCallUsedRegs()
/openbsd/gnu/llvm/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h350 BitVector getAllocatableSet(const MachineFunction &MF,
/openbsd/gnu/llvm/llvm/lib/Target/ARM/
H A DThumb1FrameLowering.cpp712 TRI.getAllocatableSet(MF, TRI.getRegClass(ARM::tGPRRegClassID)); in emitPopSpecialFixUp()
723 TRI.getAllocatableSet(MF, TRI.getRegClass(ARM::hGPRRegClassID)); in emitPopSpecialFixUp()
/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.cpp2329 BitVector BVAllocatable = TRI->getAllocatableSet(MF); in assignCalleeSavedSpillSlots()