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Searched refs:getEncodingValue (Results 1 – 25 of 64) sorted by relevance

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/openbsd/gnu/llvm/lldb/source/Plugins/Instruction/MIPS/
H A DEmulateInstructionMIPS.cpp1419 rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_LUI()
1793 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_3ops()
1794 rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_BXX_3ops()
1844 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_3ops_C()
1845 rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_BXX_3ops_C()
1923 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_Bcond_Link_C()
1992 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_Bcond_Link()
2043 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_2ops()
2101 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_2ops_C()
2376 rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_JALRS()
[all …]
/openbsd/gnu/llvm/lldb/source/Plugins/Instruction/MIPS64/
H A DEmulateInstructionMIPS64.cpp1236 rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_LUI()
1336 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_3ops()
1337 rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_BXX_3ops()
1389 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_Bcond_Link()
1500 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_Bcond_Link_C()
1568 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_2ops()
1658 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_3ops_C()
1659 rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_BXX_3ops_C()
1744 rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_BXX_2ops_C()
1867 rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_JALR()
[all …]
/openbsd/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp557 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
597 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in EncodeAddrModeOpValues()
991 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrModeImm12OpValue()
1255 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getLdStSORegOpValue()
1333 Imm8 = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode3OffsetOpValue()
1369 Imm8 = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getAddrMode3OpValue()
1602 Value |= CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getT2AddrModeSORegOpValue()
1727 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getRegisterListOpValue()
1742 return MRI.getEncodingValue(LHS.getReg()) < in getRegisterListOpValue()
1743 MRI.getEncodingValue(RHS.getReg()); in getRegisterListOpValue()
[all …]
/openbsd/gnu/llvm/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYMCCodeEmitter.cpp249 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
268 unsigned Imm = Ctx.getRegisterInfo()->getEncodingValue(Rz) - in getRegSeqImmOpValue()
269 Ctx.getRegisterInfo()->getEncodingValue(Ry); in getRegSeqImmOpValue()
271 return ((Ctx.getRegisterInfo()->getEncodingValue(Ry) << 5) | Imm); in getRegSeqImmOpValue()
279 Ctx.getRegisterInfo()->getEncodingValue(MI.getOperand(Op).getReg()); in getRegisterSeqOpValue()
281 Ctx.getRegisterInfo()->getEncodingValue(MI.getOperand(Op + 1).getReg()); in getRegisterSeqOpValue()
/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DR600ExpandSpecialInstrs.cpp127 unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK; in runOnMachineFunction()
154 if ((TRI.getEncodingValue(Src0) & 0xff) < 127 && in runOnMachineFunction()
155 (TRI.getEncodingValue(Src1) & 0xff) < 127) in runOnMachineFunction()
231 unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK; in runOnMachineFunction()
H A DR600RegisterInfo.cpp78 return this->getEncodingValue(reg) >> HW_CHAN_SHIFT; in getHWRegChan()
82 return GET_REG_INDEX(getEncodingValue(Reg)); in getHWRegIndex()
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64ExternalSymbolizer.cpp102 EncodedInst |= MCRI.getEncodingValue(MI.getOperand(0).getReg()); // reg in tryAddingSymbolicOperand()
131 MCRI.getEncodingValue(MI.getOperand(1).getReg()) << 5; // Rn in tryAddingSymbolicOperand()
132 EncodedInst |= MCRI.getEncodingValue(MI.getOperand(0).getReg()); // Rd in tryAddingSymbolicOperand()
/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DSIMCCodeEmitter.cpp344 Encoding |= MRI.getEncodingValue(AMDGPU::EXEC_LO); in encodeInstruction()
450 RegEnc |= MRI.getEncodingValue(Reg); in getSDWASrcEncoding()
481 RegEnc |= MRI.getEncodingValue(Reg); in getSDWAVopcDstEncoding()
493 uint64_t Enc = MRI.getEncodingValue(Reg); in getAVOperandEncoding()
545 Op = MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
H A DR600MCCodeEmitter.cpp153 return MRI.getEncodingValue(RegNo) & HW_REG_MASK; in getHWReg()
162 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
/openbsd/gnu/llvm/llvm/lib/Target/BPF/MCTargetDesc/
H A DBPFMCCodeEmitter.cpp83 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
159 Encoding = MRI.getEncodingValue(Op1.getReg()); in getMemoryOpValue()
/openbsd/gnu/llvm/llvm/lib/Target/MSP430/MCTargetDesc/
H A DMSP430MCCodeEmitter.cpp106 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
125 unsigned Reg = Ctx.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getMemOpValue()
/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp378 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
389 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
401 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
413 unsigned Reg = RI->getEncodingValue(Rs.getReg()); in HexagonProcessInstruction()
598 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCCodeEmitter.cpp221 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
542 unsigned RegVal = Ctx.getRegisterInfo()->getEncodingValue(RegOpnd); in EncodeRegAsMultipleOf()
558 unsigned RegVal = Ctx.getRegisterInfo()->getEncodingValue(RegOpnd); in EncodeZPR2StridedRegisterClass()
568 unsigned RegVal = Ctx.getRegisterInfo()->getEncodingValue(RegOpnd); in EncodeZPR4StridedRegisterClass()
/openbsd/gnu/llvm/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsOptionRecord.cpp78 unsigned EncVal = MCRegInfo->getEncodingValue(SubReg); in SetPhysRegUsed()
H A DMipsMCCodeEmitter.cpp96 unsigned Reg0 = Ctx.getRegisterInfo()->getEncodingValue(RegOp0); in LowerCompactBranch()
97 unsigned Reg1 = Ctx.getRegisterInfo()->getEncodingValue(RegOp1); in LowerCompactBranch()
737 unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
1046 unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg); in getRegisterListOpValue()
/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCCodeEmitter.cpp390 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2); in getTLSRegEncoding()
413 return 0x80 >> CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in get_crbitm_encoding()
444 return CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp1307 const unsigned Lower = RI->getEncodingValue(RegPair); in processInstruction()
1366 if (RI->getEncodingValue(Ry.getReg()) != RI->getEncodingValue(src.getReg())) in processInstruction()
1754 unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg()); in processInstruction()
1778 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); in processInstruction()
1795 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); in processInstruction()
1812 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction()
1832 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction()
1855 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction()
1898 unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg()); in processInstruction()
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.h34 return getEncodingValue(i); in getSEHRegNum()
H A DAArch64FalkorHWPFFix.cpp660 unsigned Dest = LI.DestReg ? TRI->getEncodingValue(LI.DestReg) : 0; in getTag()
661 unsigned Base = TRI->getEncodingValue(LI.BaseReg); in getTag()
669 Off = (1 << 5) | TRI->getEncodingValue(LI.OffsetOpnd->getReg()); in getTag()
/openbsd/gnu/llvm/llvm/lib/Target/VE/MCTargetDesc/
H A DVEMCCodeEmitter.cpp94 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
/openbsd/gnu/llvm/llvm/lib/Target/M68k/MCTargetDesc/
H A DM68kMCCodeEmitter.cpp183 Value |= RI->getEncodingValue(RegNum); in getMachineOpValue()
/openbsd/gnu/llvm/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.h245 int getSEHRegNum(unsigned i) const { return getEncodingValue(i); } in getSEHRegNum()
/openbsd/gnu/llvm/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRMCCodeEmitter.cpp259 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
/openbsd/gnu/llvm/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcMCCodeEmitter.cpp125 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
/openbsd/gnu/llvm/llvm/lib/Target/X86/
H A DX86FixupGadgets.cpp106 return TRI->getEncodingValue(MO.getReg()) & 0x7; in getRegNum()
110 return TRI->getEncodingValue(reg) & 0x7; in getRegNum()

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