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Searched refs:imm5 (Results 1 – 24 of 24) sorted by relevance

/openbsd/gnu/llvm/lldb/source/Plugins/Process/Utility/
H A DARMUtils.h24 static inline uint32_t DecodeImmShift(const uint32_t type, const uint32_t imm5, in DecodeImmShift() argument
32 return imm5; in DecodeImmShift()
35 return (imm5 == 0 ? 32 : imm5); in DecodeImmShift()
38 return (imm5 == 0 ? 32 : imm5); in DecodeImmShift()
40 if (imm5 == 0) { in DecodeImmShift()
45 return imm5; in DecodeImmShift()
69 const uint32_t imm5) { in DecodeImmShift() argument
71 return DecodeImmShift(shift_t, imm5, dont_care); in DecodeImmShift()
/openbsd/gnu/llvm/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats16Instr.td138 !strconcat(opstr, "\t$rz, $imm5"), []> {
140 bits<5> imm5;
145 let Inst{4 - 0} = imm5;
149 AddrModeNone, (outs CARRY:$ca), (ins mGPR:$rx, Immoperand:$imm5),
150 !strconcat(opstr, "\t$rx, $imm5"), []> {
152 bits<5> imm5;
157 let Inst{4 - 0} = imm5;
173 AddrModeNone, (outs mGPR:$rz), (ins mGPR:$rx, uimm5:$imm5),
174 !strconcat(opstr, "\t$rz, $rx, $imm5"), [(set mGPR:$rz, (opnode mGPR:$rx, uimm5:$imm5))]> {
177 bits<5> imm5;
[all …]
H A DCSKYInstrFormats.td271 bits<5> imm5;
276 let Inst{4 - 0} = imm5;
287 bits<5> imm5;
290 let Inst{25 - 21} = imm5;
397 let Inst{4 - 0} = regs{4 - 0}; // imm5
476 bits<5> imm5;
478 let Inst{25 - 21} = imm5;
492 bits<5> imm5;
494 let Inst{25 - 21} = imm5;
505 bits<5> imm5;
[all …]
H A DCSKYInstrInfo.td478 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
479 [(set GPR:$rz, (shl GPR:$rx, uimm5:$imm5))]>;
481 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
482 [(set GPR:$rz, (srl GPR:$rx, uimm5:$imm5))]>;
484 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
485 [(set GPR:$rz, (sra GPR:$rx, uimm5:$imm5))]>;
487 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
488 [(set GPR:$rz, (rotl GPR:$rx, uimm5:$imm5))]>;
491 "rotri32 $rz, $rx, $imm5", []>;
888 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5), []>;
[all …]
H A DCSKYInstrInfo16Instr.td159 def CMPLEI16 : CSKYPseudo<(outs CARRY:$ca), (ins mGPR:$rx, uimm5:$imm5),
160 "cmplei16\t$rx, $imm5", []>;
310 def BCLRI16 : I16_Z_5<0b100, (outs mGPR:$rz), (ins mGPR:$rZ, uimm5:$imm5),
312 def BSETI16 : I16_Z_5<0b101, (outs mGPR:$rz), (ins mGPR:$rZ, uimm5:$imm5),
317 def BTSTI16 : I16_Z_5<0b110, (outs CARRY:$ca), (ins mGPR:$rz, uimm5:$imm5),
/openbsd/gnu/llvm/llvm/lib/Target/LoongArch/
H A DLoongArchInstrFormats.td112 bits<5> imm5;
117 let Inst{14-10} = imm5;
303 bits<5> imm5;
308 let Inst{4-0} = imm5;
318 bits<5> imm5;
323 let Inst{4-0} = imm5;
H A DLoongArchInstrInfo.td397 : Fmt2RI5<op, (outs GPR:$rd), (ins GPR:$rj, ImmOpnd:$imm5), opstr,
398 "$rd, $rj, $imm5">;
574 def PRELD : FmtPRELD<(outs), (ins uimm5:$imm5, GPR:$rj, simm12:$imm12), "preld",
575 "$imm5, $rj, $imm12">;
677 def PRELDX : FmtPRELDX<(outs), (ins uimm5:$imm5, GPR:$rj, GPR:$rk), "preldx",
678 "$imm5, $rj, $rk">;
/openbsd/gnu/usr.bin/binutils-2.17/opcodes/
H A Dbfin-dis.c2976 OUTS (outf, imm5 (src0)); in decode_dsp32alu_0()
2980 OUTS (outf, imm5 (src1)); in decode_dsp32alu_0()
2993 OUTS (outf, imm5 (src0)); in decode_dsp32alu_0()
2997 OUTS (outf, imm5 (src1)); in decode_dsp32alu_0()
3010 OUTS (outf, imm5 (src0)); in decode_dsp32alu_0()
3014 OUTS (outf, imm5 (src1)); in decode_dsp32alu_0()
3027 OUTS (outf, imm5 (src0)); in decode_dsp32alu_0()
3031 OUTS (outf, imm5 (src1)); in decode_dsp32alu_0()
3044 OUTS (outf, imm5 (src0)); in decode_dsp32alu_0()
3048 OUTS (outf, imm5 (src1)); in decode_dsp32alu_0()
[all …]
/openbsd/gnu/llvm/llvm/lib/Target/ARM/
H A DARMInstrThumb.td263 // t_addrmode_is1 := reg + imm5
716 // Loads: reg/reg and reg/imm5
726 def i : // reg/imm5
738 // Stores: reg/reg and reg/imm5
744 def i : // reg/imm5
1083 bits<5> imm5;
1084 let Inst{10-6} = imm5;
1168 bits<5> imm5;
1169 let Inst{10-6} = imm5;
1186 bits<5> imm5;
[all …]
H A DARMInstrFormats.td1322 let Inst{10-6} = addr{7-3}; // imm5
H A DARMInstrInfo.td750 // {4-0} imm5 shift amount.
751 // asr #32 encoded as imm5 == 0.
H A DARMInstrThumb2.td35 // {4-0} imm5 shift amount.
/openbsd/gnu/usr.bin/binutils-2.17/gas/config/
H A Dbfin-parse.y212 #define imm5(x) EXPR_VALUE (x) macro
1855 $$ = DSP32SHIFTIMM (3, 0, imm5 ($4), 0, 0, IS_A1 ($1));
1900 $$ = DSP32SHIFTIMM (0x0, &$1, imm5 ($5), &$3, 2, HL2 ($1, $3));
1910 $$ = DSP32SHIFTIMM (0x0, &$1, imm5 ($5), &$3, $6.s0, HL2 ($1, $3));
3247 $$ = PUSHPOPMULTIPLE (imm5 ($6), imm5 ($10), 1, 1, 1);
3261 $$ = PUSHPOPMULTIPLE (imm5 ($6), 0, 1, 0, 1);
3266 $$ = PUSHPOPMULTIPLE (0, imm5 ($6), 0, 1, 1);
3280 $$ = PUSHPOPMULTIPLE (imm5 ($4), imm5 ($8), 1, 1, 0);
3294 $$ = PUSHPOPMULTIPLE (imm5 ($4), 0, 1, 0, 0);
3299 $$ = PUSHPOPMULTIPLE (0, imm5 ($4), 0, 1, 0);
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DSVEInstrFormats.td4896 bits<5> imm5;
4900 let Inst{20-16} = imm5;
5308 bits<5> imm5;
5315 let Inst{9-5} = imm5;
5354 bits<5> imm5;
5421 bits<5> imm5;
6227 bits<5> imm5;
7307 bits<5> imm5;
7443 bits<5> imm5;
7712 bits<5> imm5;
[all …]
H A DSMEInstrFormats.td3951 // Inst{20-16} = imm5;
H A DAArch64InstrFormats.td7500 class SIMDDupFromMain<bit Q, bits<5> imm5, string size, ValueType vectype,
7506 let Inst{20-16} = imm5;
/openbsd/gnu/llvm/lld/ELF/Arch/
H A DRISCV.cpp328 uint16_t imm5 = extractBits(val, 5, 5) << 2; in relocate() local
329 insn |= imm8 | imm4_3 | imm7_6 | imm2_1 | imm5; in relocate()
346 uint16_t imm5 = extractBits(val, 5, 5) << 2; in relocate() local
347 insn |= imm11 | imm4 | imm9_8 | imm10 | imm6 | imm7 | imm3_1 | imm5; in relocate()
/openbsd/gnu/llvm/llvm/lib/Target/Mips/
H A DMips16InstrFormats.td228 // Format RRI instruction class in Mips : <|opcode|rx|ry|imm5|>
237 bits<5> imm5;
244 let Inst{4-0} = imm5;
H A DMips64InstrInfo.td926 def : MipsPat<(i64 (sext (i32 (shl GPR32:$src, immZExt5:$imm5)))),
928 (SLL GPR32:$src, immZExt5:$imm5), sub_32)>;
932 def : MipsPat<(i64 (sext (i32 (srl GPR32:$src, immZExt5:$imm5)))),
934 (SRL GPR32:$src, immZExt5:$imm5), sub_32)>;
938 def : MipsPat<(i64 (sext (i32 (sra GPR32:$src, immZExt5:$imm5)))),
940 (SRA GPR32:$src, immZExt5:$imm5), sub_32)>;
/openbsd/gnu/llvm/lldb/source/Plugins/Instruction/MIPS/
H A DEmulateInstructionMIPS.cpp1490 uint32_t imm5 = insn.getOperand(2).getImm(); in Emulate_SWSP() local
1510 address = address + imm5; in Emulate_SWSP()
1633 uint32_t imm5 = insn.getOperand(2).getImm(); in Emulate_LWSP() local
1645 base_address = base_address + imm5; in Emulate_LWSP()
1736 int32_t imm5 = insn.getOperand(0).getImm(); in Emulate_JRADDIUSP() local
1755 int32_t result = src_opd_val + imm5; in Emulate_JRADDIUSP()
1767 context.SetRegisterPlusOffset(*reg_info_sp, imm5); in Emulate_JRADDIUSP()
/openbsd/gnu/usr.bin/binutils-2.17/gas/
H A Dbfin-parse.c603 #define imm5(x) EXPR_VALUE (x) macro
4195 (yyval.instr) = DSP32SHIFTIMM (3, 0, imm5 ((yyvsp[0].expr)), 0, 0, IS_A1 ((yyvsp[-3].reg)));
4245 …(yyval.instr) = DSP32SHIFTIMM (0x0, &(yyvsp[-4].reg), imm5 ((yyvsp[0].expr)), &(yyvsp[-2].reg), 2,…
4258 …(yyval.instr) = DSP32SHIFTIMM (0x0, &(yyvsp[-5].reg), imm5 ((yyvsp[-1].expr)), &(yyvsp[-3].reg), (…
5784 (yyval.instr) = PUSHPOPMULTIPLE (imm5 ((yyvsp[-5].expr)), imm5 ((yyvsp[-1].expr)), 1, 1, 1);
5800 (yyval.instr) = PUSHPOPMULTIPLE (imm5 ((yyvsp[-1].expr)), 0, 1, 0, 1);
5805 (yyval.instr) = PUSHPOPMULTIPLE (0, imm5 ((yyvsp[-1].expr)), 0, 1, 1);
5821 (yyval.instr) = PUSHPOPMULTIPLE (imm5 ((yyvsp[-7].expr)), imm5 ((yyvsp[-3].expr)), 1, 1, 0);
5837 (yyval.instr) = PUSHPOPMULTIPLE (imm5 ((yyvsp[-3].expr)), 0, 1, 0, 0);
5842 (yyval.instr) = PUSHPOPMULTIPLE (0, imm5 ((yyvsp[-3].expr)), 0, 1, 0);
/openbsd/sys/arch/arm64/arm64/
H A Ddisasm.c1409 OP5FUNC(op_ccmn_imm, sf, imm5, cond, Rn, nzcv) in OP5FUNC() argument
1413 imm5, in OP5FUNC()
1427 OP5FUNC(op_ccmp_imm, sf, imm5, cond, Rn, nzcv) in OP5FUNC() argument
1431 imm5, in OP5FUNC()
/openbsd/gnu/llvm/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.cpp3755 uint32_t imm5; // encoding for the shift amount in EmulateShiftImm() local
3774 imm5 = Bits32(opcode, 10, 6); in EmulateShiftImm()
3785 imm5 = Bits32(opcode, 14, 12) << 2 | Bits32(opcode, 7, 6); in EmulateShiftImm()
3793 imm5 = Bits32(opcode, 11, 7); in EmulateShiftImm()
3800 if (shift_type == SRType_ROR && imm5 == 0) in EmulateShiftImm()
5373 uint32_t imm5 = Bits32(opcode, 11, 7); in EmulateSTRRegister() local
5374 shift_n = DecodeImmShift(typ, imm5, shift_t); in EmulateSTRRegister()
6558 uint32_t imm5 = Bits32(opcode, 11, 7); in EmulateLDRRegister() local
6559 shift_n = DecodeImmShift(type, imm5, shift_t); in EmulateLDRRegister()
6981 uint32_t imm5 = Bits32(opcode, 11, 7); in EmulateLDRBRegister() local
[all …]
/openbsd/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoVVLPatterns.td1583 def : Pat<(vti.Vector (riscv_vmv_v_x_vl (vti.Vector undef), (ImmPat XLenVT:$imm5),
1586 XLenVT:$imm5, GPR:$vl, vti.Log2SEW)>;
1587 def : Pat<(vti.Vector (riscv_vmv_v_x_vl vti.Vector:$passthru, (ImmPat XLenVT:$imm5),
1590 $passthru, XLenVT:$imm5, GPR:$vl, vti.Log2SEW)>;