Home
last modified time | relevance | path

Searched refs:isVGPR (Results 1 – 12 of 12) sorted by relevance

/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DSIShrinkInstructions.cpp401 if (Src1.isReg() && TRI->isVGPR(*MRI, Src1.getReg())) in shrinkMadFma()
403 else if (Src0.isReg() && TRI->isVGPR(*MRI, Src0.getReg())) in shrinkMadFma()
429 if (Src2.isReg() && TRI->isVGPR(*MRI, Src2.getReg())) { in shrinkMadFma()
647 if (!TRI->isVGPR(*MRI, X)) in matchSwap()
670 if (!TRI->isVGPR(*MRI, Y)) in matchSwap()
H A DSIRegisterInfo.h283 bool isVGPR(const MachineRegisterInfo &MRI, Register Reg) const;
286 return isVGPR(MRI, Reg) || isAGPR(MRI, Reg); in isVectorRegister()
H A DSIFoldOperands.cpp414 !TII->getRegisterInfo().isVGPR(*MRI, OtherOp.getReg())) in tryAddToFoldList()
801 if (TRI->isAGPR(*MRI, Reg0) && TRI->isVGPR(*MRI, Reg1)) in foldOperand()
803 else if (TRI->isVGPR(*MRI, Reg0) && TRI->isAGPR(*MRI, Reg1)) in foldOperand()
1555 if (!ST->hasGFX90AInsts() || !TRI->isVGPR(*MRI, Reg) || in tryFoldRegSequence()
1581 if (!TRI->isVGPR(*MRI, Reg) || !MRI->hasOneNonDBGUse(Reg)) in tryFoldRegSequence()
1648 !TRI->isVGPR(*MRI, PhiIn) || !TRI->isVGPR(*MRI, PhiOut)) in tryFoldLCSSAPhi()
1692 if (DefReg.isPhysical() || !TRI->isVGPR(*MRI, DefReg)) in tryFoldLoad()
H A DSIPreAllocateWWMRegs.cpp95 if (!TRI->isVGPR(*MRI, Reg)) in processDef()
H A DGCNHazardRecognizer.cpp751 if (!Use.isReg() || !TRI->isVGPR(MF.getRegInfo(), Use.getReg())) in checkDPPHazards()
1482 if (Use.isReg() && TRI.isVGPR(MF.getRegInfo(), Use.getReg())) in fixVALUPartialForwardingHazard()
1629 if (Use.isReg() && TRI.isVGPR(MF.getRegInfo(), Use.getReg())) in fixVALUTransUseHazard()
1779 if (!TRI.isVGPR(MRI, AmtReg) || ((AmtReg - AMDGPU::VGPR0) & 7) != 7) in fixShift64HighRegBug()
1981 if (!Use.isReg() || !TRI.isVGPR(MF.getRegInfo(), Use.getReg())) in checkMAIHazards908()
2346 if (!Op.isReg() || !TRI.isVGPR(MF.getRegInfo(), Op.getReg())) in checkMAILdStHazards()
H A DSIRegisterInfo.cpp1209 bool IsVGPR = TRI->isVGPR(MRI, Reg); in spillVGPRtoAGPR()
1211 if (IsVGPR == TRI->isVGPR(MRI, ValueReg)) { in spillVGPRtoAGPR()
2912 bool SIRegisterInfo::isVGPR(const MachineRegisterInfo &MRI, in isVGPR() function in SIRegisterInfo
H A DSIFixSGPRCopies.cpp910 if (TRI->isVGPR(*MRI, Inst->getOperand(0).getReg())) { in analyzeVGPRToSGPRCopy()
H A DSIInstrInfo.cpp3059 bool isVGPRCopy = RI.isVGPR(*MRI, DstReg); in FoldImmediate()
3919 if (!Src1->isReg() || !RI.isVGPR(MRI, Src1->getReg())) in canShrink()
3932 if (!Src2->isReg() || !RI.isVGPR(MRI, Src2->getReg()) || in canShrink()
3943 if (Src1 && (!Src1->isReg() || !RI.isVGPR(MRI, Src1->getReg()) || in canShrink()
5211 if (Src0.isReg() && RI.isVGPR(MRI, Src0.getReg())) { in legalizeOperandsVOP2()
5217 if (Src1.isReg() && RI.isVGPR(MRI, Src1.getReg())) { in legalizeOperandsVOP2()
5243 RI.isVGPR(MRI, Src1.getReg())) { in legalizeOperandsVOP2()
H A DSIInstrInfo.h805 return MO.isReg() && RI.isVGPR(MRI, MO.getReg());}); in hasVGPRUses()
H A DSIPeepholeSDWA.cpp1158 if (!Op.isImm() && !(Op.isReg() && !TRI->isVGPR(*MRI, Op.getReg()))) in legalizeScalarOperands()
H A DSIWholeQuadMode.cpp890 if (TRI->isVGPR(*MRI, Op0.getReg())) { in lowerKillF32()
H A DSIInsertWaitcnts.cpp654 TRI->isVGPR(*MRI, DefMO.getReg())) { in updateByEvent()