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Searched refs:ixAZF0ENDPOINT2_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 (Results 1 – 14 of 14) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7818 #define ixAZF0ENDPOINT2_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
H A Ddcn_3_0_1_offset.h12661 #define ixAZF0ENDPOINT2_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
H A Ddcn_1_0_offset.h13505 #define ixAZF0ENDPOINT2_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
H A Ddcn_2_1_0_offset.h13265 #define ixAZF0ENDPOINT2_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
H A Ddcn_3_1_4_offset.h576 #define ixAZF0ENDPOINT2_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
H A Ddcn_3_1_5_offset.h14581 #define ixAZF0ENDPOINT2_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
H A Ddcn_3_2_0_offset.h13972 #define ixAZF0ENDPOINT2_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
H A Ddcn_3_2_1_offset.h13951 #define ixAZF0ENDPOINT2_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
H A Ddcn_3_1_2_offset.h14475 #define ixAZF0ENDPOINT2_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
H A Ddcn_3_1_6_offset.h15072 #define ixAZF0ENDPOINT2_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
H A Ddcn_3_0_2_offset.h15554 #define ixAZF0ENDPOINT2_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
H A Ddcn_2_0_0_offset.h16929 #define ixAZF0ENDPOINT2_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
H A Ddcn_3_0_0_offset.h17277 #define ixAZF0ENDPOINT2_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h17318 #define ixAZF0ENDPOINT2_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro