Home
last modified time | relevance | path

Searched refs:ixAZF0STREAM6_AZALIA_LATENCY_COUNTER_CONTROL (Results 1 – 14 of 14) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7525 #define ixAZF0STREAM6_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_0_1_offset.h12368 #define ixAZF0STREAM6_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_1_0_offset.h13212 #define ixAZF0STREAM6_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_2_1_0_offset.h12972 #define ixAZF0STREAM6_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_4_offset.h283 #define ixAZF0STREAM6_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_5_offset.h14288 #define ixAZF0STREAM6_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_2_0_offset.h13679 #define ixAZF0STREAM6_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_2_1_offset.h13658 #define ixAZF0STREAM6_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_2_offset.h14182 #define ixAZF0STREAM6_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_1_6_offset.h14779 #define ixAZF0STREAM6_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_0_2_offset.h15261 #define ixAZF0STREAM6_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_2_0_0_offset.h16636 #define ixAZF0STREAM6_AZALIA_LATENCY_COUNTER_CONTROL … macro
H A Ddcn_3_0_0_offset.h16984 #define ixAZF0STREAM6_AZALIA_LATENCY_COUNTER_CONTROL … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h17025 #define ixAZF0STREAM6_AZALIA_LATENCY_COUNTER_CONTROL … macro