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Searched refs:ixCG_SPLL_FUNC_CNTL_3 (Results 1 – 7 of 7) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_d.h47 #define ixCG_SPLL_FUNC_CNTL_3 0xc0500148 macro
H A Dsmu_7_1_1_d.h47 #define ixCG_SPLL_FUNC_CNTL_3 0xc0500148 macro
H A Dsmu_7_1_2_d.h47 #define ixCG_SPLL_FUNC_CNTL_3 0xc0500148 macro
H A Dsmu_7_1_3_d.h50 #define ixCG_SPLL_FUNC_CNTL_3 0xc0500148 macro
H A Dsmu_7_0_1_d.h47 #define ixCG_SPLL_FUNC_CNTL_3 0xc0500148 macro
H A Dsmu_7_1_0_d.h47 #define ixCG_SPLL_FUNC_CNTL_3 0xc0500148 macro
/openbsd/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_hwmgr.c4797 cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_SPLL_FUNC_CNTL_3); in smu7_read_clock_registers()