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Searched refs:ixCRT05 (Results 1 – 19 of 19) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h198 #define ixCRT05 0x0005 macro
H A Ddce_8_0_d.h5075 #define ixCRT05 0x5 macro
H A Ddce_10_0_d.h5958 #define ixCRT05 0x5 macro
H A Ddce_11_0_d.h6035 #define ixCRT05 0x5 macro
H A Ddce_11_2_d.h7709 #define ixCRT05 0x5 macro
H A Ddce_12_0_offset.h18146 #define ixCRT05 … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7195 #define ixCRT05 … macro
H A Ddcn_3_0_1_offset.h12038 #define ixCRT05 … macro
H A Ddcn_1_0_offset.h12777 #define ixCRT05 … macro
H A Ddcn_2_1_0_offset.h12642 #define ixCRT05 … macro
H A Ddcn_3_1_4_offset.h88 #define ixCRT05 … macro
H A Ddcn_3_1_5_offset.h13958 #define ixCRT05 … macro
H A Ddcn_3_2_0_offset.h13349 #define ixCRT05 … macro
H A Ddcn_3_2_1_offset.h13328 #define ixCRT05 … macro
H A Ddcn_3_1_2_offset.h13852 #define ixCRT05 … macro
H A Ddcn_3_1_6_offset.h14449 #define ixCRT05 … macro
H A Ddcn_3_0_2_offset.h14931 #define ixCRT05 … macro
H A Ddcn_2_0_0_offset.h16306 #define ixCRT05 … macro
H A Ddcn_3_0_0_offset.h16655 #define ixCRT05 … macro