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Searched refs:mmAZALIA_CRC0_CONTROL1 (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h5446 #define mmAZALIA_CRC0_CONTROL1 0x17af macro
H A Ddce_10_0_d.h6717 #define mmAZALIA_CRC0_CONTROL1 0x1806 macro
H A Ddce_11_0_d.h6879 #define mmAZALIA_CRC0_CONTROL1 0x1806 macro
H A Ddce_11_2_d.h8224 #define mmAZALIA_CRC0_CONTROL1 0x1806 macro
H A Ddce_12_0_offset.h1520 #define mmAZALIA_CRC0_CONTROL1 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h1201 #define mmAZALIA_CRC0_CONTROL1 macro
H A Ddcn_3_0_1_offset.h1402 #define mmAZALIA_CRC0_CONTROL1 macro
H A Ddcn_1_0_offset.h1842 #define mmAZALIA_CRC0_CONTROL1 macro
H A Ddcn_2_1_0_offset.h1448 #define mmAZALIA_CRC0_CONTROL1 macro
H A Ddcn_3_0_2_offset.h1374 #define mmAZALIA_CRC0_CONTROL1 macro
H A Ddcn_2_0_0_offset.h1486 #define mmAZALIA_CRC0_CONTROL1 macro
H A Ddcn_3_0_0_offset.h1388 #define mmAZALIA_CRC0_CONTROL1 macro