Searched refs:mmCB_RMI_BC_GL2_CACHE_CONTROL (Results 1 – 2 of 2) sorted by relevance
| /openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/ | ||
| H A D | gc_10_1_0_offset.h | 2971 #define mmCB_RMI_BC_GL2_CACHE_CONTROL … macro |
| H A D | gc_10_3_0_offset.h | 2938 #define mmCB_RMI_BC_GL2_CACHE_CONTROL … macro |