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Searched refs:mmDIG4_TMDS_DCBALANCER_CONTROL (Results 1 – 11 of 11) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2898 #define mmDIG4_TMDS_DCBALANCER_CONTROL 0x4884 macro
H A Ddce_8_0_d.h3468 #define mmDIG4_TMDS_DCBALANCER_CONTROL 0x4884 macro
H A Ddce_10_0_d.h4247 #define mmDIG4_TMDS_DCBALANCER_CONTROL 0x4e73 macro
H A Ddce_11_0_d.h4192 #define mmDIG4_TMDS_DCBALANCER_CONTROL 0x4e73 macro
H A Ddce_11_2_d.h5423 #define mmDIG4_TMDS_DCBALANCER_CONTROL 0x4e73 macro
H A Ddce_12_0_offset.h11316 #define mmDIG4_TMDS_DCBALANCER_CONTROL … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9571 #define mmDIG4_TMDS_DCBALANCER_CONTROL … macro
H A Ddcn_2_1_0_offset.h11147 #define mmDIG4_TMDS_DCBALANCER_CONTROL … macro
H A Ddcn_3_0_2_offset.h10885 #define mmDIG4_TMDS_DCBALANCER_CONTROL … macro
H A Ddcn_2_0_0_offset.h12234 #define mmDIG4_TMDS_DCBALANCER_CONTROL … macro
H A Ddcn_3_0_0_offset.h12021 #define mmDIG4_TMDS_DCBALANCER_CONTROL … macro