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Searched refs:mmDP0_DP_DPHY_SCRAM_CNTL (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h3924 #define mmDP0_DP_DPHY_SCRAM_CNTL 0x1cd5 macro
H A Ddce_10_0_d.h4556 #define mmDP0_DP_DPHY_SCRAM_CNTL 0x4ab6 macro
H A Ddce_11_0_d.h4548 #define mmDP0_DP_DPHY_SCRAM_CNTL 0x4ab6 macro
H A Ddce_11_2_d.h5780 #define mmDP0_DP_DPHY_SCRAM_CNTL 0x4ab6 macro
H A Ddce_12_0_offset.h10238 #define mmDP0_DP_DPHY_SCRAM_CNTL … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5506 #define mmDP0_DP_DPHY_SCRAM_CNTL … macro
H A Ddcn_3_0_3_offset.h4992 #define mmDP0_DP_DPHY_SCRAM_CNTL … macro
H A Ddcn_3_0_1_offset.h7962 #define mmDP0_DP_DPHY_SCRAM_CNTL … macro
H A Ddcn_1_0_offset.h8391 #define mmDP0_DP_DPHY_SCRAM_CNTL … macro
H A Ddcn_2_1_0_offset.h9895 #define mmDP0_DP_DPHY_SCRAM_CNTL … macro
H A Ddcn_3_0_2_offset.h9574 #define mmDP0_DP_DPHY_SCRAM_CNTL … macro
H A Ddcn_2_0_0_offset.h10988 #define mmDP0_DP_DPHY_SCRAM_CNTL … macro
H A Ddcn_3_0_0_offset.h10710 #define mmDP0_DP_DPHY_SCRAM_CNTL … macro